LC87FBG08A

No.A2046-29/30

Figure 7 Waveform observed when only POR is used (LVD not used)

(RESET pin: Pull-up resistor RRES only)

• The POR function generates a reset only when power is turned on starting at the VSS level.

• No stable reset will be generated if power is turned on again when the power level does not go down to the VSS level

as shown in (a). If such a case is anticipated, use the LVD function together with the POR function or implement an

external reset circuit.

• A reset is generated only when the power level goes down to the VSS level as shown in (b) and power is turned on

again after this condition continues for 100

μs or longer.

Figure 8 Waveform observed when both POR and LVD functions are used

(RESET pin: Pull-up resistor RRES only)

• Resets are generated both when power is turned on and when the power level lowers.

• A hysteresis width (LVHYS) is provided to prevent the repetitions of reset release and entry cycles near the detection

level.

POR release voltage

(PORRL)

VDD

RES

Unknown-state

(POUKS)

(a)

(b)

Reset period

Reset period

100

μs or longer

VDD

RES

LVD hysteresis width

(LVHYS)

Unknown-state

(LVUKS)

Reset period

Reset period

Reset period

LVD release voltage

(LVDET+LVHYS)

LVD reset voltage

(LVDET)