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LC87FBG08A Datasheet(PDF) 17 Page - ON Semiconductor |
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LC87FBG08A Datasheet(HTML) 17 Page - ON Semiconductor |
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17 / 30 page ![]() LC87FBG08A No.A2046-17/30 SIO0 Serial I/O Characteristics at Ta = -40 °C to +85°C, VSS1 = 0V (Note 4-1-1) Parameter Symbol Pin/ Remarks Conditions Specification VDD[V] min typ max unit Frequency tSCK(1) SCK0(P12) • See Fig. 5. 1.8 to 5.5 2 tCYC Low level pulse width tSCKL(1) 1 High level pulse width tSCKH(1) 1 tSCKHA(1) • Continuous data transmission/reception mode • See Fig. 5. (Note 4-1-2) 4 Frequency tSCK(2) SCK0(P12) • CMOS output selected • See Fig. 5. 1.8 to 5.5 4/3 Low level pulse width tSCKL(2) 1/2 tSCK High level pulse width tSCKH(2) 1/2 tSCKHA(2) • Continuous data transmission/reception mode • CMOS output selected • See Fig. 5. tSCKH(2) +2tCYC tSCKH(2) +(10/3) tCYC tCYC Data setup time tsDI(1) SB0(P11), SI0(P11) • Must be specified with respect to rising edge of SIOCLK. • See Fig. 5. 1.8 to 5.5 0.05 μs Data hold time thDI(1) 0.05 Output delay time tdD0(1) SO0(P10), SB0(P11) • Continuous data transmission/reception mode (Note 4-1-3) 1.8 to 5.5 (1/3)tCYC +0.08 tdD0(2) • Synchronous 8-bit mode (Note 4-1-3) 1tCYC +0.08 tdD0(3) (Note 4-1-3) (1/3)tCYC +0.08 Note 4-1-1: These specifications are theoretical values. Add margin depending on its use. Note 4-1-2: To use serial-clock-input in continuous trans/rec mode, a time from SI0RUN being set when serial clock is "H" to the first negative edge of the serial clock must be longer than tSCKHA. Note 4-1-3: Must be specified with respect to falling edge of SIOCLK. Must be specified as the time to the beginning of output state change in open drain output mode. See Fig. 5. |
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