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LC87FBG08A Datasheet(PDF) 22 Page - ON Semiconductor |
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LC87FBG08A Datasheet(HTML) 22 Page - ON Semiconductor |
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22 / 30 page ![]() LC87FBG08A No.A2046-22/30 Continued from preceding page. Parameter Symbol Pin/ Remarks Conditions Specification VDD[V] min typ max unit Normal mode consumption current (Note 10-1) (Note 10-2) IDDOP(10) VDD1 • FsX’tal=32.768kHz crystal oscillation mode • System clock set to 32.768kHz side • Internal low speed and medium speed RC oscillation stopped. • Frequency variable RC oscillation stopped. • 1/2 frequency division ratio 1.8 to 5.5 34 97 μA 1.8 to 3.6 14 44 IDDOP(11) • FsX’tal=32.768kHz crystal oscillation mode • System clock set to 32.768kHz side • Internal low speed and medium speed RC oscillation stopped. • Frequency variable RC oscillation stopped. • 1/2 frequency division ratio • Ta=-10 to +50°C 5.0 34 88 3.3 14 36 2.5 9.1 22 HALT mode consumption current (Note 10-1) (Note 10-2) IDDHALT(1) • HALT mode • FmCF=12MHz ceramic oscillation mode • System clock set to 12MHz side • Internal low speed and medium speed RC oscillation stopped. • Frequency variable RC oscillation stopped. • 1/1 frequency division ratio 2.7 to 5.5 2.6 4.8 mA 2.7 to 3.6 1.4 2.4 IDDHALT(2) • HALT mode • CF1=24MHz external clock • System clock set to CF1 side • Internal low speed and medium speed RC oscillation stopped. • Frequency variable RC oscillation stopped. • 1/2 frequency division ratio 3.0 to 5.5 2.7 5.3 3.0 to 3.6 1.6 2.9 IDDHALT(3) • HALT mode • FmCF=10MHz ceramic oscillation mode • System clock set to 10MHz side • Internal low speed and medium speed RC oscillation stopped. • Frequency variable RC oscillation stopped. • 1/1 frequency division ratio 2.2 to 5.5 2.2 4.3 2.2 to 3.6 1.2 2.2 IDDHALT(4) • HALT mode • FmCF=4MHz ceramic oscillation mode • System clock set to 4MHz side • Internal low speed and medium speed RC oscillation stopped. • Frequency variable RC oscillation stopped. • 1/1 frequency division ratio 1.8 to 5.5 1.3 3.3 1.8 to 3.6 0.56 1.2 IDDHALT(5) • HALT mode • CF oscillation low amplifier size selected. (CFLAMP=1) • FmCF=4MHz ceramic oscillation mode • System clock set to 4MHz side • Internal low speed and medium speed RC oscillation stopped. • Frequency variable RC oscillation stopped. • 1/4 frequency division ratio 2.2 to 5.5 0.74 1.8 2.2 to 3.6 0.34 0.68 IDDHALT(6) • HALT mode • FsX’tal=32.768kHz crystal oscillation mode • Internal low speed RC oscillation stopped. • System clock set to internal medium speed RC oscillation • Frequency variable RC oscillation stopped. • 1/2 frequency division ratio 1.8 to 5.5 0.32 0.90 1.8 to 3.6 0.21 0.44 Note10-1: Values of the consumption current do not include current that flows into the output transistors and internal pull-up resistors. Note10-2: The consumption current values do not include operational current of LVD function if not specified. Continued on next page. |
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