LC87FBG08A

No.A2046-25/30

Characteristics of a Sample Main System Clock Oscillation Circuit

Given below are the characteristics of a sample main system clock oscillation circuit that are measured using a Our

designated oscillation characteristics evaluation board and external components with circuit constant values with

which the oscillator vendor confirmed normal and stable oscillation.

Table 1 Characteristics of a Sample Main System Clock Oscillator Circuit with a Ceramic Oscillator

• CF oscillation normal amplifier size selected (CFLAMP=0)

MURATA

Nominal

Frequency

Type

Oscillator Name

Circuit Constant

Operating

Voltage

Range

[V]

Oscillation

Stabilization Time

Remarks

C1

[pF]

C2

[pF]

Rf

[

Ω]

Rd

[

Ω]

typ

[ms]

max

[ms]

12MHz

SMD

CSTCE12M0G52-R0

(10)

(10)

Open

680

2.6 to 5.5

0.02

0.3

Internal

C1, C2

10MHz

SMD

CSTCE10M0G52-R0

(10)

(10)

Open

680

2.1 to 5.5

0.02

0.3

LEAD

CSTLS10M0G53-B0

(15)

(15)

Open

680

2.4 to 5.5

0.02

0.3

CSTLS10M0G53095-B0

(15)

(15)

Open

680

2.0 to 5.5

0.01

0.15

8MHz

SMD

CSTCE8M00G52-R0

(10)

(10)

Open

1k

2.1 to 5.5

0.02

0.3

LEAD

CSTLS8M00G53-B0

(15)

(15)

Open

1k

2.2 to 5.5

0.02

0.3

CSTLS8M00G53095-B0

(15)

(15)

Open

1k

1.9 to 5.5

0.01

0.15

6MHz

SMD

CSTCR6M00G53-R0

(15)

(15)

Open

1.5k

2.0 to 5.5

0.02

0.3

CSTCR6M00G53093-R0

(15)

(15)

Open

1.5k

1.8 to 5.5

0.01

0.15

LEAD

CSTLS6M00G53-B0

(15)

(15)

Open

1.5k

2.0 to 5.5

0.02

0.3

CSTLS6M00G53095-B0

(15)

(15)

Open

1.5k

1.8 to 5.5

0.01

0.15

4MHz

SMD

CSTCR4M00G53-R0

(15)

(15)

Open

1.5k

1.8 to 5.5

0.03

0.45

LEAD

CSTLS4M00G53-B0

(15)

(15)

Open

1.5k

1.8 to 5.5

0.02

0.3

• CF oscillation low amplifier size selected (CFLAMP=1)

MURATA

Nominal

Frequency

Type

Oscillator Name

Circuit Constant

Operating

Voltage

Range

[V]

Oscillation

Stabilization Time

Remarks

C1

[pF]

C2

[pF]

Rf

[

Ω]

Rd

[

Ω]

typ

[ms]

max

[ms]

12MHz

SMD

CSTCE12M0G52-R0

(10)

(10)

Open

470

3.9 to 5.5

0.03

0.45

Internal

C1, C2

10MHz

SMD

CSTCE10M0G52-R0

(10)

(10)

Open

470

2.9 to 5.5

0.03

0.45

LEAD

CSTLS10M0G53-B0

(15)

(15)

Open

470

3.6 to 5.5

0.03

0.45

CSTLS10M0G53095-B0

(15)

(15)

Open

470

2.7 to 5.5

0.02

0.3

8MHz

SMD

CSTCE8M00G52-R0

(10)

(10)

Open

680

2.7 to 5.5

0.03

0.45

LEAD

CSTLS8M00G53-B0

(15)

(15)

Open

680

3.0 to 5.5

0.03

0.45

CSTLS8M00G53095-B0

(15)

(15)

Open

680

2.5 to 5.5

0.01

0.15

6MHz

SMD

CSTCR6M00G53-R0

(15)

(15)

Open

1k

2.6 to 5.5

0.03

0.45

CSTCR6M00G53095-R0

(15)

(15)

Open

1k

2.2 to 5.5

0.02

0.3

LEAD

CSTLS6M00G53-B0

(15)

(15)

Open

1k

2.7 to 5.5

0.03

0.45

CSTLS6M00G53095-B0

(15)

(15)

Open

1k

2.2 to 5.5

0.01

0.15

4MHz

SMD

CSTCR4M00G53-R0

(15)

(15)

Open

1k

2.1 to 5.5

0.04

0.6

CSTCR4M00G53095-R0

(15)

(15)

Open

1k

1.8 to 5.5

0.02

0.3

LEAD

CSTLS4M00G53-B0

(15)

(15)

Open

1k

2.1 to 5.5

0.02

0.3

CSTLS4M00G53095-B0

(15)

(15)

Open

1k

1.8 to 5.5

0.01

0.15

The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized in

follwing cases (see Figure 3).

• The time interval that is required for the oscillation to get stabilized after the instruction for starting the mainclock

oscillation circuit is executed.

• The time interval that is required for the oscillation to get stabilized after the HOLD mode is reset and oscillation is

started.

• The time interval that is required for the oscillation to get stabilized after the X’tal Hold mode, under the state which

the main clock oscillation is enabled, is reset and oscillation is started.