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AX8052F151 Datasheet(PDF) 45 Page - ON Semiconductor |
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AX8052F151 Datasheet(HTML) 45 Page - ON Semiconductor |
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45 / 51 page ![]() Application Information www.onsemi.com AX8052F151 45 7. Application Information Connecting to Debug Adapter GND GND VDDA GND ANTP ANTN GND GND RESET_N DBG_EN PB7 PB6 PB5 PB4 VDDA PB3 AX8052F151 100pF 4.7uF DBG_EN DBG_RT_N GND DBG_CLK DBG_DATA GND DBG_VDD Jumper JP1 1 2 3 4 5 6 7 8 16 MHz XTAL 32 kHz XTAL Debug adapter connector 1uF Figure 9 Typical application diagram with connection to the debug adapter Short Jumper JP1-1 if it is desired to supply the target board from the Debug Adapter (50mA max). Connect the bottom exposed pad of the AX8052F151 to ground. If the debugger is not running, PB6 and PB7 are not driven by the Debug Adapter. If the debugger is running, the PB6 and PB7 values that the software reads may be set using the Pin Emulation feature of the debugger. PB3 is driven by the debugger only to bring the AX8052F151 out of Deep Sleep. It is high impedance otherwise. The 32 kHz crystal is optional, the fast crystal at pins CLK16N and CLK16P is used as reference frequency for the RF RX/TX. Crystal load capacitances should be chosen according to the crystal ‘s datasheet. At pins CLK16N and CLK16P they the internal programmable capacitors may be used, at pins PA3 and PA4 capacitors must be connected externally. It is mandatory to add 1µF (low ESR) between VREG and GND. Decoupling capacitors are not all drawn. It is recommended to add 100nF decoupling capacitor for |
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