AX8052F151 datasheet(28/51 Pages) ONSEMI

28 / 51 page

Circuit Description

www.onsemi.com

AX8052F151

by any of the enabled GPIO or system controller interrupts. For most applications this

will be a GPIO or wakeup timer interrupt.

DEEPSLEEP

The microcontroller, all peripherals and the transceiver are shut down. Only 4 bytes of

scratch RAM are retained. DEEPSLEEP can only be exited by tying the PB3 pin low.

Clocking

LPOSC

Calib

FRCOSC

Calib

Wakeup

Timer

WDT

Clock

Monitor

Prescaler

÷1,2,4,...

FRCOSC

XOSC

LPXOSC

LPOSC

Interrupt

Internal Reset

SYSCLK

System Clock

Figure 6 Clock System Diagram

The system clock can be derived from any of the following clock sources:

•

The crystal oscillator (RF reference oscillator, typically 16 MHz, via SYSCLK)

•

The low speed crystal oscillator (typical 32 kHz tuning fork)

•

The internal high speed RC (20 MHz) oscillator

•

The internal low power (640 Hz/10 kHz) oscillator

An additional pre-scaler allows the selected oscillator to be divided by a power of two. After reset,

the microcontroller starts with the internal high speed RC oscillator selected and divided by two.

I.e. at start-up, the microcontroller runs with 10 MHz ± 10%. Clocks may be switched any time by

writing to the CLKCON register. In order to prevent clock glitches, the switching takes

approximately 2·(T1+T2), where T1 and T2 are the periods of the old and the new clock. Switching

AX8052F151 Datasheet(PDF) 28 Page - ON Semiconductor

AX8052F151 Datasheet(HTML) 28 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51

Datasheet Download

Link URL