AX8052F151 datasheet(29/51 Pages) ONSEMI

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Circuit Description

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AX8052F151

may take longer if the new oscillator first has to start up. Internal oscillators start up

instantaneously, but crystal oscillators may take a considerable amount of time to start the

oscillation.

CLKSTAT can be read to determine the clock switching status.

A programmable clock monitor resets the

CLKCON register when no system clock transitions are

found during a programmable time interval, thus reverts to the internal RC oscillator.

Both internal oscillators can be slaved to one of the crystal oscillators to increase the accuracy of

the oscillation frequency. While the reference oscillator runs, the internal oscillator is slaved to the

reference frequency by a digital frequency locked loop. When the reference oscillator is switched

off, the internal oscillator continues to run unslaved with the last frequency setting.

Reset and Interrupts

After reset, the microcontroller starts executing at address 0x0000. Several events can lead to

resetting the microcontroller core:

•

POR or hardware RESET_N pin activated and released

•

Leaving SLEEP or DEEPSLEEP mode

•

Watchdog Reset

•

Software Reset

The reset cause can be determined by reading the

PCON register.

The microcontroller supports 22 interrupt sources. Each interrupt can be individually enabled and

can be programmed to have one of two possible priorities. The interrupt vectors are located at

0x0003, 0x000B, …, 0x00AB.

Debugging

A hardware debug unit considerably eases debugging compared to other 8052 microcontrollers. It

allows to reliably stop the microcontroller at breakpoints even if the stack is smashed. The debug

unit communicates with the host PC running the debugger using a 3 wire interface. One wire is

dedicated (DBG_EN), while two wires are shared with GPIO pins (PB6, PB7). When DBG_EN is

driven high, PB6 and PB7 convert to debug interface pins and the GPIO functionality is no longer

available. A pin emulation feature however allows bits PINB[7:6] to be set and PORTB[7:6] and

DIRB[7:6] to be read by the debugger software. This allows for example switches or LEDs

connected to the PB6, PB7 pins to be emulated in the debugger software whenever the debugger is

active.

In order to protect the intellectual property of the firmware developer, the debug interface can be

locked using a developer-selectable 64-bit key. The debug interface is then disabled and can only

be enabled with the knowledge of this 64-bit key. Therefore, unauthorized persons cannot read the

firmware through the debug interface, but debugging is still possible for authorized persons.

Secure erase can be initiated without key knowledge; secure erase ensures that the main FLASH

array is completely erased before erasing the key, reverting the chip into factory state.

The DebugLink peripheral looks like an UART to the microcontroller, and allows exchange of data

between the microcontroller and the host PC without disrupting program execution.

AX8052F151 Datasheet(PDF) 29 Page - ON Semiconductor

AX8052F151 Datasheet(HTML) 29 Page - ON Semiconductor

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