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AX8052F151 Datasheet(PDF) 30 Page - ON Semiconductor |
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AX8052F151 Datasheet(HTML) 30 Page - ON Semiconductor |
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30 / 51 page ![]() Circuit Description www.onsemi.com AX8052F151 30 5.2. Timer, Output Compare and Input Capture The AX8052F151 features three general purpose 16-bit timers. Each timer can be clocked by the system clock, any of the available oscillators, or a dedicated input pin. The timers also feature a programmable clock inversion, a programmable prescaler that can divide by powers of two, and an optional clock synchronization logic that synchronizes the clock to the system clock. All three counters are identical and feature four different counting modes, as well as a Σ∆ mode that can be used to output an analog value on a dedicated digital pin only employing a simple RC lowpass filter. Two output compare units work in conjunction with one of the timers to generate PWM signals. Two input capture units work in conjunction with one of the timers to measure transitions on an input signal. For software timekeeping, two additional 16-bit wakeup timers with 4 16-bit event registers are provided, generating an interrupt on match events. 5.3. UART The AX8052F151 features two universal asynchronous receiver transmitters. They use one of the timers as baud rate generator. Word length can be programmed from 5 to 9 bits. 5.4. SPI Master/Slave Controller The AX8052F151 features a master/slave SPI controller. Both 3 and 4 wire SPI variants are supported. In master mode, any of the on-chip oscillators or the system clock may be selected as clock source. An additional prescaler with divide by two capability provides additional clocking flexibility. Shift direction, as well as clock phase and inversion, are programmable. |
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