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LAN8820 Datasheet(PDF) 56 Page - Microchip Technology |
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LAN8820 Datasheet(HTML) 56 Page - Microchip Technology |
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56 / 83 page ![]() LAN8820/LAN8820I DS00001871B-page 56 2009-2015 Microchip Technology Inc. 4.3.5 RECEIVE ERROR-FREE PACKETS COUNTER MID REGISTER 4.3.6 RECEIVE ERROR-FREE PACKETS COUNTER LOW REGISTER Index: U3 Size: 16 bits Bits Description Type Default 15:0 RCVGPKT[31:16] Counts the received error-free packets. Contains the 16 middle bits of the 48-bit counter. RO 0000h Note: The 48-bit receive error-free packets counter is split across 3 registers. In order to read the counter cor- rectly, the registers must be read in the following order: Receive Error-Free Packets Counter Low Register, Receive Error-Free Packets Counter Mid Register, Receive Error-Free Packets Counter High Register. After reading the high register, the counter will be automatically cleared. Index: U4 Size: 16 bits Bits Description Type Default 15:0 RCVGPKT[15:0] Counts the received error-free packets. Contains the 16 low-order bits of the 48-bit counter. RO 0000h Note: The 48-bit receive error-free packets counter is split across 3 registers. In order to read the counter cor- rectly, the registers must be read in the following order: Receive Error-Free Packets Counter Low Register, Receive Error-Free Packets Counter Mid Register, Receive Error-Free Packets Counter High Register. After reading the high register, the counter will be automatically cleared. |
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