Electronic Components Datasheet Search
  English  ▼

X  

C165 Datasheet(PDF) 46 Page - Infineon Technologies AG

Part # C165
Description  16-Bit Single-Chip Microcontroller
PDF  77 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

C165 Datasheet(HTML) 46 Page - Infineon Technologies AG

Back Button C165 Datasheet HTML 42Page - Infineon Technologies AG C165 Datasheet HTML 43Page - Infineon Technologies AG C165 Datasheet HTML 44Page - Infineon Technologies AG C165 Datasheet HTML 45Page - Infineon Technologies AG C165 Datasheet HTML 46Page - Infineon Technologies AG C165 Datasheet HTML 47Page - Infineon Technologies AG C165 Datasheet HTML 48Page - Infineon Technologies AG C165 Datasheet HTML 49Page - Infineon Technologies AG C165 Datasheet HTML 50Page - Infineon Technologies AG Next Button
Zoom Inzoom in Zoom Outzoom out
 46 / 77 page
background image
C165
Data Sheet
42
V2.0, 2000-12
AC Characteristics
Table 10
External Clock Drive XTAL1 (Standard Supply Voltage Range)
(Operating Conditions apply)
Parameter
Symbol
Direct Drive
1:1
Prescaler
2:1
Unit
min.
max.
min.
max.
Oscillator period
tOSC SR 40
–20
–
ns
High time1)
1) The clock input signal must reach the defined levels V
IL2 and VIH2.
t1
SR 202)
2) The minimum high and low time refers to a duty cycle of 50%. The maximum operating frequency (f
CPU) in
direct drive mode depends on the duty cycle of the clock input signal.
–6–
ns
Low time1)
t2
SR 202)
–6–
ns
Rise time1)
t3
SR –10
–
6ns
Fall time1)
t4
SR –10
–
6ns
Table 11
External Clock Drive XTAL1 (Reduced Supply Voltage Range)
(Operating Conditions apply)
Parameter
Symbol
Direct Drive
1:1
Prescaler
2:1
Unit
min.
max.
min.
max.
Oscillator period
tOSC SR 50
–
25
–
ns
High time1)
1) The clock input signal must reach the defined levels V
IL2 and VIH2.
t1
SR 252)
2) The minimum high and low time refers to a duty cycle of 50%. The maximum operating frequency (f
CPU) in
direct drive mode depends on the duty cycle of the clock input signal.
–8–
ns
Low time1)
t2
SR 252)
–8–
ns
Rise time1)
t3
SR –10
–
6ns
Fall time1)
t4
SR –10
–
6ns



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com