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C165 Datasheet(PDF) 69 Page - Infineon Technologies AG |
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C165 Datasheet(HTML) 69 Page - Infineon Technologies AG |
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69 / 77 page ![]() C165 Data Sheet 65 V2.0, 2000-12 AC Characteristics CLKOUT and READY (Standard Supply Voltage) (Operating Conditions apply) Parameter Symbol Max. CPU Clock = 25 MHz Variable CPU Clock 1 / 2TCL = 1 to 25 MHz Unit min. max. min. max. CLKOUT cycle time t29 CC 40 40 2TCL 2TCL ns CLKOUT high time t30 CC 14 –TCL - 6 – ns CLKOUT low time t31 CC 10 – TCL - 10 – ns CLKOUT rise time t32 CC – 4 –4ns CLKOUT fall time t33 CC – 4 –4ns CLKOUT rising edge to ALE falling edge t34 CC 0 + tA 10 + tA 0 + tA 10 + tA ns Synchronous READY setup time to CLKOUT t35 SR 14 – 14 – ns Synchronous READY hold time after CLKOUT t36 SR 4 – 4–ns Asynchronous READY low time t37 SR 54 – 2TCL + t58 –ns Asynchronous READY setup time1) 1) These timings are given for test purposes only, in order to assure recognition at a specific clock edge. t58 SR 14 – 14 – ns Asynchronous READY hold time1) t59 SR 4 – 4–ns Async. READY hold time after RD, WR high (Demultiplexed Bus)2) 2) Demultiplexed bus is the worst case. For multiplexed bus 2TCL are to be added to the maximum values. This adds even more time for deactivating READY. The 2 tA and tC refer to the next following bus cycle, tF refers to the current bus cycle. The maximum limit for t60 must be fulfilled if the next following bus cycle is READY controlled. t60 SR 0 0 + 2 tA + tC + tF 2) 0TCL - 20 + 2 tA + tC + tF 2) ns |
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