C164SL datasheet(60/79 Pages) INFINEON

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C164CI/SI

C164CL/SL

Data Sheet

V2.0, 2001-05

Sample time and conversion time of the C164CI’s A/D Converter are programmable.

Table 14 should be used to calculate the above timings.

The limit values for

fBC must not be exceeded when selecting ADCTC.

Converter Timing Example:

Assumptions:

fCPU = 25 MHz (i.e. tCPU = 40 ns), ADCTC = ‘00’, ADSTC = ‘00’.

Basic clock

fBC

fCPU/4 = 6.25 MHz, i.e. tBC = 160 ns.

Sample time

tBC × 8 = 1280 ns.

Conversion time

tS + 40 tBC + 2 tCPU = (1280 + 6400 + 80) ns = 7.8 µs.

8) During the sample time the input capacitance C

AIN can be charged/discharged by the external source. The

internal resistance of the analog source must allow the capacitance to reach its final voltage level within

tS.

After the end of the sample time

tS, changes of the analog input voltage have no effect on the conversion result.

Values for the sample time

tS depend on programming and can be taken from Table 14.

Table 14

A/D Converter Computation Table

ADCON.15|14

(ADCTC)

A/D Converter

Basic Clock

fBC

ADCON.13|12

(ADSTC)

Sample time

fCPU / 4

tBC × 8

fCPU / 2

tBC × 16

fCPU / 16

tBC × 32

fCPU / 8

tBC × 64

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