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Z80 Datasheet(PDF) 72 Page - Zilog, Inc. |
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Z80 Datasheet(HTML) 72 Page - Zilog, Inc. |
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72 / 330 page  <%27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Direct Memory Access attains the bus, the transfers are made at maximum speed. If the transfers are long, however, this mode can interfere with other CPU activities, which come to a halt for the entire duration of DMA transfers. In the Continuous mode (Figure 23), the DMA requests the bus in the same manner as other modes and repetitively transfers bytes in the same manner as Burst mode. However, unlike the Burst mode the bus is retained by the DMA whenever an inactive Ready signal is encountered prior to a stop on end-of-block or byte match. The DMA simply idles, while holding onto the bus, until Ready becomes active again. Then it completes the transfer sequence. This is the fastest of the three modes because it eliminates the necessity of releasing the bus and requesting it again between complete block transfers. In this mode, however, the system bus is continuously preempted by the DMA. This mode is usually used only when very fast transfers are required and when the impact on CPU activities can be tolerated. This might be the case, for instance, when an operating system is beingloadedto memoryfrom disk. Due to the DMA’s high-speed buffered method of reading data, operations on one byte are not completed until the next byte is read in. This means that total transfer or search block lengths must be two or more bytes, even in the Byte mode, and that block lengths programmed into the DMA must be one less than the desired block length. This characteristic is described in detail in Internal Structure under the section entitled, “Address and Byte Counting” on page 75.” |
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