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DP83865 Datasheet(PDF) 42 Page - National Semiconductor (TI) |
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DP83865 Datasheet(HTML) 42 Page - National Semiconductor (TI) |
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42 / 86 page ![]() www.national.com 42 3.0 Configuration (Continued) The Auto-Negotiation priority resolution are as follows: 1. 1000BASE-T Full Duplex (Highest Priority) 2. 1000BASE-T Half Duplex 3. 100BASE-TX Full Duplex 4. 100BASE-TX Half Duplex 5. 10BASE-T Full Duplex 6. 10BASE-T Half Duplex (Lowest Priority) 3.3.2 Gigabit Speed Fallback When gigabit mode is advertised, the default auto-negotia- tion mode attempts to establish link at the highest common denominator advertised. However, there are situations that the cable media may not be appropriate for the gigabit speed communication. If achieving a quality link is the highest priority, the Speed Fallback Mode can be enabled. The Speed Fallback Mode allows auto-negotiation to link at the next lower speed advertised (100Mbps or 10Mbps) if the gigabit mode fails. There are three criteria established to initiate the gigabit Speed Fallback. 1. Auto-negotiation failing to achieve a stable gigabit link 2. CRC error rate 3. Idle error rate There are four basic control register bits used to configure the Speed Fallback. Expanded register 0x1C0.3 = 1 enables the Speed Fallback mode. LED Control Register 0x13.2:0 selects the criteria for the Speed Fallback. The default for AN Speed Fallback is that after five tries to achieve a stable link, the link speed will drop down to the next lower advertised speed. The default CRC and IE Speed Fallback is that after five link drops due to increase error rate, the link speed drops down to the next lower advertised speed. If during the link retry stage that the link partner drops the link or the CAT5 cable is unplugged, the retry counter will reload the retry count with the default value of five. Note that the Speed Fallback works only from gigabit mode to 100 Mbps or 10 Mbps. 3.3.3 Gigabit Retry Forced Link Under the situations that the cable media may not be appropriate for the gigabit transmission, it may take exces- sive number of retries to achieve a stable link. If achieving a stable link is the highest priority, the Retry Forced Link Mode can be enabled. Retry Forced Link Mode allows auto-negotiation to force link at the highest common link speed after five retries. There are two criteria established to initiate the gigabit Retry Forced Link. 1. CRC error rate 2. Idle error rate There are three basic control register bits used to configure the Speed Fallback and Retry Forced Link. Expanded reg- ister 0x1C0.3 = 0 enables the Retry Forced Link mode (i.e., teh default mode upon power up). LED Control Register 0x13.1:0 selects the criteria for the Speed Fallback. Since Retry Forced Link does not work when AN fails to achieve stable link, LED Control Register 0x13.2 should be 0. The default CRC and IE Retry Forced Link is that after five link drops due to increase error rate, the link will be forced at the highest advertised speed. If during the link retry stage that the link partner drops the link or the CAT5 cable is unplugged, the retry counter will reload the retry count with the default value of five. Note that the retry may take forever to achieve a forced link when link partner drops the link or CAT5 cable is unplugged. 3.3.4 Master/Slave Resolution If 1000BASE-T mode is selected during the priority resolu- tion, the second goal of Auto-Negotiation is to resolve Mas- ter/Slave configuration. The Master mode priority is given to the device that supports multiport nodes, such as switches and repeaters. Single node devices such as DTE or NIC card takes lower Master mode priority. MULTI_EN is a strapping option for advertising the Multi- node functionality. (Table 36) In the case when both PHYs advertise the same option, the Master/Slave resolution is Table 33. Speed/Duplex Selection, AN_EN = 1 DUP Speed[1] Speed[0] Comments 0 0 0 1000/100/10 HDX 0 0 1 1000/100 HDX 0 1 0 1000 HDX 0 1 1 1000/10 HDX 1 0 0 1000/100/10 FDX + HDX 1 0 1 1000/100 FDX + HDX 1 1 0 1000 FDX + HDX 1 1 1 1000/10 FDX + HDX Table 34. LED Control Reg 0x13, Reg 0x1C0.3 = 1 Bit 2, AN Bit 1, CRC Bit 0, IE Comments 0 0 0 No Speed Fallback (SF) 0 0 1 SF on idle error 0 1 0 SF on CRC error 0 1 1 SF on idle and CRC 1 0 0 SF on failing AN 1 0 1 SF on AN and IE 1 1 0 SF on AN and CRC 1 1 1 SF on AN, CRC, and IE Table 35. LED Control Reg 0x13, Reg 0x1C0.3 = 0 Bit 2, AN Bit 1, CRC Bit 0, IE Comments 0 0 0 No Retry Forced Link (RFL) 0 0 1 RFL on idle error 0 1 0 RFL on CRC error 0 1 1 RFL on idle and CRC |
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