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DP83865 Datasheet(PDF) 14 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part # DP83865
Description  DP83865 Gig PHYTER V 10/100/1000 Ethernet Physical Layer
PDF  86 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP83865 Datasheet(HTML) 14 Page - National Semiconductor (TI)

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14
1.0 Pin Description (Continued)
45
RXD7
Output
Receive Data 7: Connect to MAC chip through
a single 50
Ω impedance trace. This output is ca-
pable of driving 35 pf load and is not intended to
drive connectors, cables, backplanes or multiple
traces. This applies if the part is in 100 Mbps
mode or 1000 Mbps mode.
46
RXD6
Output
Receive Data 6: Connect to MAC chip through
a single 50
Ω impedance trace. This output is ca-
pable of driving 35 pf load and is not intended to
drive connectors, cables, backplanes or multiple
traces. This applies if the part is in 100 Mbps
mode or 1000 Mbps mode.
47
RXD5
Output
Receive Data 5: Connect to MAC chip through
a single 50
Ω impedance trace. This output is ca-
pable of driving 35 pf load and is not intended to
drive connectors, cables, backplanes or multiple
traces. This applies if the part is in 100 Mbps
mode or 1000 Mbps mode.
48
CORE_VDD
Power
Core VDD: (Digital) Connect to 1.8V.
49
VSS
Ground
Ground: Connect to common ground plane.
50
RXD4
Output
Receive Data 4: Connect to MAC chip through
a single 50
Ω impedance trace. This output is ca-
pable of driving 35 pf load and is not intended to
drive connectors, cables, backplanes or multiple
traces. This applies if the part is in 100 Mbps
mode or 1000 Mbps mode.
51
RXD3/RX3
Output
Receive Data 3: Connect to MAC chip through
a single 50
Ω impedance trace. This output is ca-
pable of driving 35 pf load and is not intended to
drive connectors, cables, backplanes or multiple
traces. This applies if the part is in 100 Mbps
mode or 1000 Mbps mode.
52
RXD2/RX2
Output
Receive Data 2: Connect to MAC chip through
a single 50
Ω impedance trace. This output is ca-
pable of driving 35 pf load and is not intended to
drive connectors, cables, backplanes or multiple
traces. This applies if the part is in 100 Mbps
mode or 1000 Mbps mode.
53
IO_VDD
Power
I/O VDD: (Digital) Connect to 2.5V or 3.3V. The
VDD_SEL pin must be tied accordingly.
54
VSS
Ground
Ground: Connect to common ground plane.
55
RXD1/RX1
Output
Receive Data 1: Connect to MAC chip through
a single 50
Ω impedance trace. This output is ca-
pable of driving 35 pf load and is not intended to
drive connectors, cables, backplanes or multiple
traces. This applies if the part is in 100 Mbps
mode or 1000 Mbps mode.
56
RXD0/RX0
Output
Receive Data 0: Connect to MAC chip through
a single 50
Ω impedance trace. This output is ca-
pable of driving 35 pf load and is not intended to
drive connectors, cables, backplanes or multiple
traces. This applies if the part is in 100 Mbps
mode or 1000 Mbps mode.
Table 1.
Pin #
Data Sheet Pin Name
Type
Connection / Comment



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