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PC87591L Datasheet(PDF) 238 Page - National Semiconductor (TI) |
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PC87591L Datasheet(HTML) 238 Page - National Semiconductor (TI) |
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238 / 437 page  Embedded Controller Modules (Continued) www.national.com 238 Revision 1.07 4.17.5 Usage Hints The hints below apply when Idle mode is used with a disabled HFCG. 1. When disabling HFCG in Idle mode, on wake-up, a frequency clock may be generated that differs from the selected set- ting due to temperature variations in the working environment during the idle period. For details on the resulting deviation from the nominal frequency, refer to “tCLKINTwk” on page 385. To avoid any failures that may result from waking up to a higher frequency in case the access time to the internal or external memory is marginal using the current BIU config- uration, follow the procedures exactly. Before entering Idle mode, configure SZCFGi (where i=0-2) for an additional Wait clock cycle (see Section 4.1.10 on page 83 for details on SZCFGi configuration). 2. After waking up from Idle mode, wait 0.5 seconds before returning to the optimal SZCFG0 configuration. |
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