PC87591L datasheet(241/437 Pages) NSC

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Embedded Controller Modules (Continued)

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When the new HFCGML, HFCGMH and HFCGN register values are loaded, the HFCG holds OSCCLK low until the frequen-

cy multiplier locks onto the target frequency and the new frequency stabilizes. The core domain clock is also low during this

time. This automatic locking process can take several milliseconds to complete.

Frequencies within the range of 4 MHz to 20 MHz are valid. See Table 36 for a sampling of selected frequencies and their

corresponding M and N values.

Table 36. Frequencies of Selected Settings

Fast Clock Setting. This operation enables changing the clock frequency while in PMC Enabled SuperI/O Disabled state

or switching from SuperI/O Enabled PMC Enabled state to PMC Enabled SuperI/O Disabled state.

The HFCG maintains an internal I variable. The I variable is defined by two byte-wide registers: HFCGIL and HFCGIH. If

new M and N values are loaded, the frequency multiplier automatically searches for the I value needed to lock onto the target

frequency. The locking process can take several milliseconds to complete. The I variable can be recorded for a given M and

N set of values and used later to reduce the time needed for frequency locking.

To record the I value:

1. Read the low byte of the I value via HFCGIL register.

2. Check if IVLID bit in HFCGCTRL1 register is set to 0. If yes, repeat steps 1 and 2.

3. Read the upper six bits of the I value via HFCGIH register.

To fast load a new setting, load the M and N values and the corresponding I value. Then set FAST bit in HFCGCTRL1 reg-

ister to 1. The FAST command loads (simultaneously) the new values into the frequency multiplier and loads the program-

mable pre-scaler with 0 (set to a divide by 1). Note that HFCGP register does not change its contents. The frequency

multiplier quickly locks onto the target frequency without searching for a new I value.

To fast set a new clock frequency:

1. Write the N value to HFCGN register.

2. Write the low byte of the M value to HFCGML register.

3. Write the upper bits of the M value to HFCGMH register.

4. Write the low byte of the I value to HFCGIL register.

5. Write the upper six bits of the I value to HFCGIH register.

6. Set FAST bit in HFCGCTRL1 register to 1.

Changes in temperature or voltage may cause variations in the value of I for a given output frequency. If these changes

occur in the interval between recording I and its use, the output frequency generated following a fast frequency setting may

differ from the target frequency. However, after some time, the output frequency converges to the desired frequency.

Frequency1 (MHz)

1. This value is referred to as tCLKINTnom in the AC

speciﬁcations.

HFCGMH

HFCGML

HFCGN

4.00 (default)

0316

CF16

0816

5.00

0316

9216

0616

6.00

0316

9216

0516

7.00

0716

8116

0916

8.00

0A16

7C16

0B16

9.00

0A16

B916

0A16

10.00

0A16

B916

0916

12.00

1116

2A16

0C16

14.00

1916

0716

0F16

16.00

1116

2916

0916

18.00

1116

2916

0816

20.00

1716

D616

0A16

PC87591L Datasheet(PDF) 241 Page - National Semiconductor (TI)

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