PC87591L datasheet(246/437 Pages) NSC

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Embedded Controller Modules (Continued)

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HFCGI Low Value Register (HFCGIL)

The HFCGIL register contains the lower eight bits of the frequency multiplier I value. Data written to the register is stored in

the setup buffer. Reading the register returns the value of its first 8 bits. (IVLID bit in HFCGCTRL1 register indicates if the

data is valid.)

Location: 00 FFA816

Type: R/W

HFCGI High Value Register (HFCGIH)

The HFCGIH register is a byte-wide, read/write register containing the upper six bits of the frequency multiplier I value. Data

written to the register is stored in the setup buffer. Reading the register returns the HFCGIH value of the currently set fre-

quency.

Location: 00 FFAA16

Type: R/W

HFCG Pre-Scaler Register (HFCGP)

The HFCGP register is a byte-wide, read/write register. It allows the core clock to be derived from the 96 MHz clock.

On reset HFCGP is initialized to 1716.

Location: 00 FFAC16

Type: R/W

Bit

76543210

Name

HFCGI7-0

Bit

Description

7-0

HFCGI7-0. Contains the lower eight bits of the I value.

Bit

76543210

Name

Reserved

HFCGI13-8

Bit

Description

5-0

HFCGI13-8. Contains the upper six bits of the I value.

7-6

Reserved.

Bit

76543210

Name

Reserved

HFCGP4-0

Reset

00010111

Bit

Description

4-0

HFCGP4-0 (Pre-Scaler Divider Value). The divider of OSCCLK is the number defined by HFCGP(4-0) + 1,

e.g., a value of 0016 results in a divide by 1; a value of 1F16 results in a divide by 32.

Results are undeﬁned when the pre-scaler holds a value that yields a core domain clock frequency higher than

20 MHz or lower than 3 MHz.

The pre-scaler is set according to the value held in HFCGP register when LOAD96 bit or FAST96 bit is set (1).

Reading HFCGP register returns the last value written to it.

7-5

Reserved.

PC87591L Datasheet(PDF) 246 Page - National Semiconductor (TI)

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