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PC87591L Datasheet(PDF) 323 Page - National Semiconductor (TI) |
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PC87591L Datasheet(HTML) 323 Page - National Semiconductor (TI) |
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323 / 437 page  Host Controller Interface Modules (Continued) Revision 1.07 323 www.national.com 5.5.5 MSWC Host Registers The MSWC registers are organized in four banks, all of which are battery-backed. The offsets are related to a base address that is determined by the MSWC Base Address register in the device configuration registers. The lower 19 offsets are com- mon to the four banks; the upper offsets (1316-1F16) are divided as follows: ● Bank 0 is reserved. ● Bank 1 is reserved. ● Bank 2 holds the Event Routing Configuration and Wake-Up Extension Control registers. The active bank is selected through the Configuration Bank Select field (bits 1-0) in the Wake-Up Configuration register (WK_CFG). As a programing aid, the registers are described in this chapter according to the following functional groupings: ● General status ● Enable ● Configuration ● Routing For a summary of the abbreviations used for Register Type, see “Register Abbreviations and Access” on page 34. MSWC Host Register Map The following tables list the MSWC host registers. For the MSWC core register map, see Section 5.5.6 on page 328. Table 44. Banks 0, 1, 2 and 3 - The Common Control and Status Register Map Table 45. Bank 2 - Event Routing Configuration Register Map Wake-Up Event Status Register 0 (WK_STS0) This register is set to 0016 on VPP power-up, VCC power-up or Host Domain Software reset. It indicates which wake-up events, associated with the register, have occurred. Writing 1 to a bit clears it to 0. Writing 0 has no effect. Bit 6 behaves in a special way, as described in the table below. Location: Offset 0016 Type: R/W1C Offset Mnemonic Register Name Type 0016 WK_STS0 Wake-Up Event Status 0 R/W1C 0216 WK_EN0 Wake-Up Enable 0 R/W 0416 WK_CFG Wake-Up Configuration R/W 0616 WK_SIGV Wake-Up Signal Value RO 0716 WK_STATE Wake-Up ACPI State WO Other Reserved Offset Mnemonic Register Name Type 1316 WK_SMIEN0 Wake-Up SMI Enable 0 R/W 1516 WK_IRQEN0 Wake-Up Interrupt Request Enable 0 R/W Other Reserved Bit 76543210 Name Module IRQ Event Status Software Event Status Reserved RING Event Status Reserved RI2 Event Status RI1 Event Status Reset 00000000 |
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