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PC87591L Datasheet(PDF) 324 Page - National Semiconductor (TI) |
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PC87591L Datasheet(HTML) 324 Page - National Semiconductor (TI) |
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324 / 437 page  Host Controller Interface Modules (Continued) www.national.com 324 Revision 1.07 Wake-Up Events Enable Register (WK_EN0) This register is set to 0016 on VPP power-up or Host Domain Software reset. When enabled wake-up events are detected, the PWUREQ signal is activated. Location: Offset 0216 Type: R/W Bit Description 0 RI1 Event Status. 0: Event not detected (default) 1: Event detected 1 RI2 Event Status. 0: Event not detected (default) 1: Event detected 2 Reserved. 3 RING Event Status. RING event detection, according to the RING detection mode enabled. 0: Event not detected (default) 1: Event detected 5-4 Reserved. 6 Software Event Status. This bit may work in two modes, as defined by HSECM bit in MSWCTL1 register (see “MSWC Control Status Register 1 (MSWCTL1)” on page 329). When HSECM is 0, writing 1 to Software Event Status bit inverts its value. When HSECM is 1, writing 1 to Software Event Status bit sets it; the bit is cleared by a write of 1 to bit 6 in MSHES0 register. 0: Event not active (default) 1: Event active 7 Module IRQ Event Status. This sticky bit shows the status of the module IRQ event detection. 0: Event not active (default) 1: Event active Bit 76543210 Name Module IRQ Event Enable Software Event Enable Reserved RING Event Enable Reserved RI2 Event Enable RI1 Event Enable Reset 00000000 Bit Description 0 RI1 Event Enable. 0: Disabled (default) 1: Enabled 1 RI2 Event Enable. 0: Disabled (default) 1: Enabled 2 Reserved. 3 RING Event Enable. 0: Disabled (default) 1: Enabled |
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