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PC87591L Datasheet(PDF) 326 Page - National Semiconductor (TI) |
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PC87591L Datasheet(HTML) 326 Page - National Semiconductor (TI) |
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326 / 437 page ![]() Host Controller Interface Modules (Continued) www.national.com 326 Revision 1.07 Wake-Up ACPI State Register (WK_STATE) This is a read/write register. It always returns 0016 when read. Location: Offset 0716 Type: R/W Bit Description 0 SMI Output Value. 0: SMI output is low (asserted) 1: SMI output is high (de-asserted) 1 SMI Wake-Up Output Value. 0: SMI output of the wake-up module is low (asserted) 1: SMI output of the wake-up module is high (de-asserted) 2 PM1 SMI Output Value. 0: SMI output of the Power Management channel 1 is low (asserted) 1: SMI output of the Power Management channel 1 is high (de-asserted) 3 PM2 SMI Output Value. 0: SMI output of the Power Management channel 2 is low (asserted) 1: SMI output of the Power Management channel 2 is high (de-asserted) 4 PWUREQ Wake-Up Output Value. 0: PWUREQ output is low (asserted) 1: PWUREQ output is high (de-asserted) 5 PWUREQ Wake-Up Value. 0: PWUREQ output of the wake-up module is low (asserted) 1: PWUREQ output of the wake-up module is high (de-asserted) 7-6 Reserved. Bit 76543210 Name Reserved S5 S4 S3 S2 S1 Reserved Bit Description 0 Reserved. 1 S1 (Request to Change to S1 State). A write of 1 to this bit indicates to the core that the host requests to change to S1 state. The S state and transition are interpreted, as specified in the ACPI standard for S state change requests. This bit always reads back 0. 0: Not an S1 state request 1: S1 state setting request 2 S2 (Request to Change to S2 State). A write of 1 to this bit indicates to the core that the host requests to change to S2 state. The S state and transition are interpreted, as specified in the ACPI standard for S state change requests This bit always reads back 0. 0: Not an S2 state request 1: S2 state setting request |
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