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PC87591L Datasheet(PDF) 381 Page - National Semiconductor (TI) |
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PC87591L Datasheet(HTML) 381 Page - National Semiconductor (TI) |
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381 / 437 page ![]() 7.0 Device Specifications (Continued) Revision 1.07 381 www.national.com 7.4.3 DAC Characteristics 7.5 PACKAGE THERMAL INFORMATION Thermal resistance (degrees C/W) ThetaJC and ThetaJA values for the various packages of the PC87591x are as follows: Table 70. Theta ( Θ) J Values Airflow for ThetaJA values is measured in linear feet per minute (lfpm). Parameter Symbol Conditions1 1. All parameters specified for 0 °C ≤ T A ≤ 70°C. AVCC = 3.3V ± 5%, unless otherwise specified. Min Typ Max Unit Resolution RES 8 Bit Offset Error2 2. The difference between 0V and the actual voltage value for code 0016. OER AVCC = 3.3V ±1 LSB Gain Error3 3. The difference between 255/256 * AVCC and the actual voltage for code FF16. GER AVCC = 3.3V ±1 LSB Integral Non-linearity Error4 4. The maximum difference between the ideal (straight) conversion line and the actual conversion curve, not including the offset, gain and quantization ( ±0.5 LSB) errors. INL AVCC = 3.3V, 0 ≤ V OUT ≤ AVCC ±0.5 LSB Differential Non-linearity Error5 5. The maximum difference between an ideal step size (1 LSB) and any actual step size. DNL AVCC = 3.3V, 0 ≤ V OUT ≤ AVCC ±0.56 6. Monotonic. LSB Output Voltage Range VOUT 0AVCC V Analog Output Resistance RS 0 ≤ V OUT ≤ AVCC 234 K Ω Analog Output Capacitance CAO 10 15 pF DAC Settling Time7 7. Time from the converter loading with data, to output voltage settling within an error of ±0.5 LSB. TSET CL =50pF 1 µs DAC Enable Delay8 8. Time from the moment when DACENn=1 in DACCTRL register until the settling of the output voltage. TEND CL =50pF 10 µs Package Type ThetaJA@0 lfpm ThetaJA@225 lfpm ThetaJA@500 lfpm ThetaJA@900 lfpm ThetaJC 128 LQFP 47.1 34.6 29.3 28.8 15.3 176 LQFP 39.8 32.3 29.5 26.2 5.1 |
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