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DS2155 Datasheet(PDF) 233 Page - Dallas Semiconductor

Part # DS2155
Description  T1/E1/J1 Single-Chip Transceiver TDM/UTOPIA II Interface
PDF  262 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS2155 Datasheet(HTML) 233 Page - Dallas Semiconductor

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34.
FUNCTIONAL TIMING DIAGRAMS
34.1 T1 Mode
Figure 34-1. Receive-Side D4 Timing
Note 1: RSYNC in the frame mode (IOCR1.5 = 0) and double-wide frame sync is not enabled (IOCR1.6 = 0).
Note 2: RSYNC in the frame mode (IOCR1.5 = 0) and double-wide frame sync is enabled (IOCR1.6 = 1).
Note 3: RSYNC in the multiframe mode (IOCR1.5 = 1).
Note 4: RLINK data (Fs bits) is updated one bit prior to even frames and held for two frames.
Figure 34-2. Receive-Side ESF Timing
Note 1: RSYNC in frame mode (IOCR1.4 = 0) and double-wide frame sync is not enabled (IOCR1.6 = 0).
Note 2: RSYNC in frame mode (IOCR1.4 = 0) and double-wide frame sync is enabled (IOCR1.6 = 1).
Note 3: RSYNC in multiframe mode (IOCR1.4 = 1).
Note 4: ZBTSI mode disabled (T1RCR2.2 = 0).
Note 5: RLINK data (FDL bits) is updated one bit time before odd frames and held for two frames.
Note 6: ZBTSI mode is enabled (T1RCR2.2 = 1).
Note 7: RLINK data (Z bits) is updated one bit time before odd frames and held for four frames.
FRAME#
1
2345
6789
10
11
12
12
345
4
RLINK
RLCLK
3
RSYNC
1
RSYNC
RFSYNC
2
RSYNC
1
2345
6789 10 11 12
1
2
3
6
RFSYNC
FRAME#
TLCLK
RSYNC
RSYNC
RSYNC
TLINK
13 14 15 16 17 18 19 20 21 22 23 24 1
2345
4
RLCLK
RLINK
5
7



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