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MCP19124 Datasheet(PDF) 133 Page - Microchip Technology |
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MCP19124 Datasheet(HTML) 133 Page - Microchip Technology |
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133 / 236 page  2016 Microchip Technology Inc. DS20005619A-page 133 MCP19124/5 REGISTER 20-4: PMADRH: PROGRAM MEMORY ADDRESS HIGH BYTE REGISTER U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 — — — — PMADRH<3:0> bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-4 Unimplemented: Read as ‘0’ bit 3-0 PMADRH<3:0>: 4 Most Significant Address bits or High bits for Program Memory Reads REGISTER 20-5: PMCON1: PROGRAM MEMORY CONTROL REGISTER 1 U-0 R/W-0 U-0 U-0 U-0 R/W-0 R/S-0 R/S-0 — CALSEL — — —WREN WR RD bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown S = Bit can only be set bit 7 Unimplemented: Read as '0' bit 6 CALSEL: Program Memory Calibration Space Select bit 1 = Select test memory area for reads only (for loading calibration trim registers) 0 = Select user area for reads bit 5-3 Unimplemented: Read as '0' bit 2 WREN: Program Memory Write Enable bit 1 = Allows write cycles 0 = Inhibits write to the EEPROM bit 1 WR: Write Control bit 1 = Initiates a write cycle to program memory. (The bit is cleared by hardware when write is complete. The WR bit can only be set (not cleared) in software.) 0 = Write cycle to the Flash memory is complete bit 0 RD: Read Control bit 1 = Initiates a program memory read. (The read takes one cycle. The RD is cleared in hardware; the RD bit can only be set (not cleared) in software.) 0 = Does not initiate a Flash memory read |
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