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MCP19124 Datasheet(PDF) 155 Page - Microchip Technology |
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MCP19124 Datasheet(HTML) 155 Page - Microchip Technology |
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155 / 236 page ![]() 2016 Microchip Technology Inc. DS20005619A-page 155 MCP19124/5 27.1.4 PWM DUTY CYCLE (DCLOCK) The PWM duty cycle (DCLOCK) is specified by writing to the PWMRL register. Up to 8-bit resolution is available. The following equation is used to calculate the PWM duty cycle (DCLOCK). EQUATION 27-3: The PWMRL bits can be written to at any time, but the duty cycle value is not latched into PWMRH until after a match between PR2 and TMR2 occurs. 27.2 Operation During Sleep When the device is placed in Sleep, the allocated timer will not increment and the state of the module will not change. If the CLKPIN pin is driving a value, it will continue to drive that value. When the device wakes up, it will continue from this state. PWM DUTY CYCLE PWMRL T OSC T2 PRESCALE VALUE = TABLE 27-1: SUMMARY OF REGISTERS ASSOCIATED WITH PWM MODULE Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page MODECON MSC1 MSC0 RFB —MSC2 — — — 52 T2CON — — — — — TMR2ON T2CKPS1 T2CKPS0 144 PR2 Timer2 Module Period Register 153* PWMRL PWM Register Low Byte 153* PWMPHL Phase Shift Low Byte 153* Legend: — = Unimplemented locations, read as ‘0’. Shaded cells are not used by PWM mode. * Page provides register information. |
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