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MCP19124 Datasheet(PDF) 195 Page - Microchip Technology |
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MCP19124 Datasheet(HTML) 195 Page - Microchip Technology |
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195 / 236 page ![]() 2016 Microchip Technology Inc. DS20005619A-page 195 MCP19124/5 bit 3-0 SSPM<3:0>: Synchronous Serial Port Mode Select bits 0000 = Reserved 0001 = Reserved 0010 = Reserved 0011 = Reserved 0100 = Reserved 0101 = Reserved 0110 = I2C Slave mode, 7-bit address 0111 = I2C Slave mode, 10-bit address 1000 = I2C Master mode, clock = FOSC/(4 x (SSPADD+1)) (3) 1001 = Reserved 1010 = Reserved 1011 = I2C Firmware-Controlled Master mode (Slave idle) 1100 = Reserved 1101 = Reserved 1110 = I2C Slave mode, 7-bit address with Start and Stop bit interrupts enabled 1111 = I2C Slave mode, 10-bit address with Start and Stop bit interrupts enabled REGISTER 28-2: SSPCON1: SSP CONTROL REGISTER 1 (CONTINUED) Note 1: In Master mode, the overflow bit is not set since each new reception (and transmission) is initiated by writing to the SSPBUF register. 2: When enabled, the SDA and SCL pins must be configured as inputs. 3: SSPADD values of 0, 1 or 2 are not supported for I2C mode. |
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