MCP19124 datasheet(196/236 Pages) MICROCHIP

196 / 236 page

MCP19124/5

DS20005619A-page 196

 2016 Microchip Technology Inc.

SSPCON2: SSP CONTROL REGISTER 2

R/W-0/0

R-0/0

R/W-0/0

R/S/HS-0/0 R/S/HS-0/0

R/S/HS-0/0

R/W/HS-0/0

GCEN

ACKSTAT

ACKDT

ACKEN (1)

RCEN (1)

PEN (1)

RSEN (1)

SEN (1)

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’

= Bit is set

‘0’

= Bit is cleared

H = Bit is set by hardware

S = User set

bit 7

GCEN: General Call Enable bit (in I2C Slave mode only)

= Enable interrupt when a general call address (0x00 or 00h) is received in the SSPSR register

= General call address disabled

bit 6

ACKSTAT: Acknowledge Status bit (in I2C mode only)

= Acknowledge was not received

= Acknowledge was received

bit 5

ACKDT: Acknowledge Data bit (in I2C mode only)

In Receive mode:

Value transmitted when the user initiates an Acknowledge sequence at the end of a receive

= Not Acknowledge

= Acknowledge

bit 4

ACKEN: Acknowledge Sequence Enable bit (in I2C Master mode only)

In Master Receive mode:

= Initiate Acknowledge sequence on SDA and SCL pins and transmit ACKDT data bit. Automatically

cleared by hardware.

= Acknowledge sequence idle

bit 3

RCEN: Receive Enable bit (in I2C Master mode only)

= Enables Receive mode for I2C

=Receive idle

bit 2

PEN: Stop Condition Enable bit (in I2C Master mode only)

SCK Release Control:

= Initiate Stop condition on SDA and SCL pins. Automatically cleared by hardware.

= Stop condition idle

bit 1

RSEN: Repeated Start Condition Enabled bit (in I2C Master mode only)

= Initiate Repeated Start condition on SDA and SCL pins. Automatically cleared by hardware.

= Repeated Start condition idle

bit 0

SEN: Start Condition Enabled bit (in I2C Master mode only)

In Master mode:

= Initiate Start condition on SDA and SCL pins. Automatically cleared by hardware.

= Start condition idle

In Slave mode:

= Clock stretching is enabled for both Slave Transmit and Slave Receive (stretch enabled)

= Clock stretching is disabled

Note 1: If the I2C module is not in Idle mode, this bit may not be set (no spooling) and the SSPBUF may not be

written (or writes to the SSPBUF are disabled).

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