THCV231 datasheet(15/56 Pages) THINE

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THCV231_THCV236_Rev.2.30_E

THine Electronics, Inc.

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Table 13. Sub-Link Field BET Operation Setting

THCV231/THCV236

Common Setting

THCV231

Setting

THCV236

Setting

Condition

BET

BET_SEL

PDN

GPIO3

GPIO4

PDN1

MSSEL

LATEN

Sub-Link

Output

Latch

Select

(*1)

(*2)

(*3)

Field BET

Operation

(THCV231→THCV236)

Latched

Result

(*3)

Field BET

Operation

(THCV236→THCV231)

*1 THCV231: Register setting (0x53 bit1), THCV236: Pin setting. Note that BET pin should be 0 at power on sequence.

*2 Register setting (0x53 bit0, Default 0)

*3 Forbidden 0 setting

Table 14. Sub-Link Slave device Sub-Link Field BET Result

BETOUT

Output

Bit Error Occurred

No Error

THCV231

THCV236

CLKIN

BET=1

(Register)

Test Pattern

Checker

Test Pattern

Generator

Data inputs

are ignored

RF/BETOUT

Test Point

for

Field BET

LATEN/SD3/AIN1/GPIO0 = 0 or 1

BET_SEL=0

(Register)

BET=1

(Pin)

BET_SEL=0

(Register)

Main-Link

Figure 3. Main-Link Field BET Configuration

THCV231

THCV236

Test Pattern

Checker

Test Pattern

Generator

RF/BETOUT

Test Point

for

Field BET

OSC

BET=1

(Register)

BET_SEL=1

(Register)

LATEN/SD3/AIN1/GPIO0 =1

BET=1

(Pin)

BET_SEL=1

(Register)

Sub-Link

THCV236

THCV231

Test Pattern

Checker

Test Pattern

Generator

RF/BETOUT

Test Point

for

Field BET

OSC

BET=1

(Register)

BET_SEL=1

(Register)

GPIO4=1

BET=1

(Pin)

BET_SEL=1

(Register)

Sub-Link

Figure 4. Sub-Link Field BET Configuration

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