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THCV231 Datasheet(PDF) 42 Page - THine Electronics, Inc.

Part # THCV231
Description  The THCV231 and THCV236 are designed to support video data transmission between the host and display.
PDF  56 Pages
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Manufacturer  THINE [THine Electronics, Inc.]
Direct Link  http://www.thine.co.jp/index_e.html
Logo THINE - THine Electronics, Inc.

THCV231 Datasheet(HTML) 42 Page - THine Electronics, Inc.

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Table 48. 2-wire serial slave AC Timing (Sub-Link Master device)
Symbol
Parameter
Min
Typ
Max
Unit
fSCL
SCL clock frequency
-
-
400
kHz
tHD;STA
Hold time (repeated) START condition
0.6
-
-
us
tLOW
LOW period of the SCL clock
1.3
-
-
us
tHIGH
HIGH period of the SCL clock
0.6
-
-
us
tHD;DAT
Data hold time: output
-
9×tOSC
-
us
Data hold time: input
20
-
-
ns
tSU;DAT
Data setup time: output
500
-
-
ns
Data setup time: input
100
-
-
ns
tr
Rise time of both SDA and SCL signals
-
-
300(*1)
ns
tf
Fall time of both SDA and SCL signals
(pull-up resistor:2.5kΩ,bus capacitance:400pF)
-
-
300
ns
tSU;STO
Setup time for STOP condition
0.6
-
-
ns
tBUF
Bus free time between a STOP and START condition
1.3
-
-
us
tSP
Pulse width of spikes which must be suppressed by the
input filter
-
-
50
ns
tPDS
Required wait time from PDN1 high to START condition
2
-
-
ms
*1 Please adjust Pull-up resistor and bus capacitance to meet the spec value.
Table 49. 2-wire serial master AC Timing (Sub-Link Slave device)
Symbol
Parameter
Min
Typ
Max
Unit
tOSC
Cycle of internal oscillator clock
10.417
12.5
15.625
ns
tHD;STA
Hold time (repeated) START condition
-
(SCL_W_H × 8 – 3)
× tOSC
-
us
tLOW
LOW period of the SCL clock
-
((SCL_W_L + 1) × 8 + 8)
× tOSC
-
us
tHIGH
HIGH period of the SCL clock
-
((SCL_W_H + 1) × 8 + 8)
× tOSC
-
us
tHD;DAT
Data hold time: output
-
9×tOSC
-
us
Data hold time: input
20
-
-
ns
tSU;DAT
Data setup time: output
31×tOSC
-
-
ns
Data setup time: input
100
-
-
ns
tr
Rise time of both SDA and SCL signals
-
-
300(*1)
ns
tf
Fall time of both SDA and SCL signals
(pull-up resistor:2.5kΩ, bus capacitance:400pF)
-
-
300
ns
tSU;STO
Setup time for STOP condition
-
386×tOSC
-
ns
tBUF
Bus free time between a STOP and START
condition
4.7
-
-
us
*1 Please adjust Pull-up resistor and bus capacitance to meet the spec value.
Table 50. 2-wire serial interface transaction wait time
Symbol
Parameter
Min
Typ
Max
Unit
tWSSR
Write access completion time to Sub-Link Slave
register
-
-
110
us
tRSSR
Read access completion time to Sub-Link Slave
register
-
-
90
us
tWRS
Write start to Remote side Start Condition
generating time
-
-
65
us
tRPW
Remote side Stop Condition generating to Write
access completion time
-
-
300
us
tRRS
Read start to Remote side Start Condition
generating time
-
-
65
us
tRPR
Remote side Stop Condition generating to Read
access completion time
-
-
300
us
tSSEP
Sub-Link Slave External processing time
Depending on characteristics of 2-wire
serial slave devices connected to
Sub-Link Slave
us



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