THCV231 datasheet(20/56 Pages) THINE

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THCV231_THCV236_Rev.2.30_E

THine Electronics, Inc.

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Security E

Read/Write access to Sub-Link Slave Register

HOST MPU can access to Sub-Link Slave’s register via Sub-Link Master by Sub-Link Master register settings.

Sub-Link Block

2-wire

Slave

Sub-Link

Master

Sub-Link

Master Device

Sub-Link

Slave Device

Sub-Link Block

Sub-Link

Slave

2-wire

Master

Sub-Link

line

LOCKN/

MSSEL=0

AIN1,AIN0 = User Select

Interrupt signal

Host

MPU

SD1(SCL)

SD0(SDA)

INT

(Address

0x00 – 0x7F)

(Address

0x80 – 0xFF)

Figure 9. Host MPU to Sub-Link Slave Register access configuration

Table 19. Sub-Link slave register Write Procedure

Step

Description

R/W

Address

Write 1 or 0 and clear(auto clear) access status register (2WIRE_ACS_END_INT).

0x02 bit7

Set the data for Sub-Link Slave to write (Max 16byte).

0x10-0x1F

Set Device ID of Sub-Link Master device.

(Value corresponding to AIN1 and AIN0 setting. e.g.[AIN1,AIN0]=[0,0] → 7’h0B)

0x20

Set the byte number written to Sub-Link Slave (Max 16byte).

(Byte number = register value + 1)

0x21

Set the start address of Sub-Link Slave register to write.

0x23

Write 1 to WR_START_8B. (Start write access to Sub-Link Slave register)

0x25 (*1)

(*2)

2-wire serial slave of Sub-Link Master perform clock stretching until Sub-Link Slave

(*3)

When write access is completed, 2WIRE_ACS_END_INT register value become 1

and interrupt occurs (INT=H → L).

If write access was normally ended, read value should be “0x1”.

0x02 bit7

*1 It’s Prohibit that HOST MPU start access to Sub-Link Slave or remote 2-wire serial slave before the previous access to

Sub-Link Slave or remote side 2-wire serial slave is completed.

*2 When 2WIRE_MODE = 00 (Clock Stretching Mode)

*3 When 2WIRE_MODE = 01 (No Clock Stretching Mode)

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