SLMA002 datasheet(37/55 Pages) TI1

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Input Capacitor Selection

(

)

(

)

OUTPUTx

RMS(outputx )

OUTPUTx

(38)

Boot Strap Capacitor

ILIM

SEQ

Power Dissipation

(

)

(

)

(

)

Outputx

RMS(Outputx)

OUTPUT

(39)

(

)

(

)

(

)

CON

DS on

QSW rms

(40)

(

)

(

) (

)

OSS

IN max

(41)

TPS54283,, TPS54286

SLUS749C – JULY 2007 – REVISED OCTOBER 2007

The TPS54283 datasheet recommends a minimum 10-

µF ceramic input capacitor on each PVDD pin. These

capacitor must be capable of handling the RMS ripple current of the converter. The RMS current in the input

capacitors is estimated by Equation 38.

• I

RMS(CIN) = 0.43 A

One 1210 10-

µF, 25 V, X5R ceramic capacitor with 2-mΩ ESR and a 2-A RMS current rating are selected for

each PVDD input. Higher voltage capacitors are selected to minimize capacitance loss at the DC bias voltage to

ensure the capacitors maintains sufficient capacitance at the working voltage.

To ensure proper charging of the high-side FET gate and limit the ripple voltage on the boost capacitor, a 33-nF

boot strap capacitor is used.

Current limit must be set above the peak inductor current IL(peak). Comparing IL(peak) to the available minimum

current limits, ILIM is left floating for the highest current limit level.

The SEQ pin is left floating, leaving the enable pins to function independently. If the enable pins are tied

together, the two supplies start-up ratiometrically. Alternatively, SEQ could be connected to BP or GND to

provide sequential start-up.

The power dissipation in the TPS54283 is composed of FET conduction losses, switching losses and internal

regulator losses. The RMS FET current is found using Equation 39.

This results in 1.05-A RMS for Channel 1 and 0.87-A RMS for Channel 2.

Conduction losses are estimated by:

Conduction losses of 198 mW and 136 mW are estimated for Channel 1 and Channel 2 respectively.

The switching losses are estimated in Equation 41.

From the data sheet of the MBRS320, the junction capacitance is 658 pF. Since this is large compared to the

output capacitance of the TPS54x8x the FET capacitance is neglected, leaving switching losses of 17 mW for

each channel.

The regulator losses are estimated in Equation 42.

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Product Folder Link(s): TPS54283 TPS54286

SLMA002 Datasheet(PDF) 37 Page - Texas Instruments

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