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AD9640 Datasheet(PDF) 41 Page - Analog Devices |
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AD9640 Datasheet(HTML) 41 Page - Analog Devices |
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41 / 54 page  AD9640 Rev. B | Page 39 of 52 CHANNEL/CHIP SYNCHRONIZATION The AD9640 has a SYNC input that allows the user flexible synchronization options for synchronizing the internal blocks. The clock divider sync feature is useful to guarantee synchronized sample clocks across multiple ADCs. The signal monitor block can also be synchronized using the SYNC input allowing properties of the input signal to be measured during a specific time period. The input clock divider can be enabled to synchronize on a single occurrence of the sync signal or on every occurrence. The signal monitor block is synchronized on every SYNC input signal. The SYNC input is internally synchronized to the sample clock; however, to ensure there is no timing uncertainty between multiple parts, the SYNC input signal should be externally synchronized to the input clock signal, meeting the setup and hold times shown in Table 8. The SYNC input should be driven using a single- ended CMOS-type signal. |
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