AD7294 datasheet(39/48 Pages) AD

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AD7294

Data Sheet

Rev. I | Page 38 of 47

Reading Data from an 8-Bit Register

Reading the contents from any of the 8-bit registers is a single

byte read operation, as shown in Figure 55. In this protocol, the

first part of the transaction writes to the register pointer. When

the register address has been set up, any number of reads can be

performed from that particular register without having to write

to the address pointer register again. When the required number

of reads is completed, the master should not acknowledge the final

byte. This tells the slave to stop transmitting, allowing a stop

condition to be asserted by the master. Further reads from this

having to rewrite to the register pointer.

If a read from a different address is required, the relevant

and again, any number of reads from this register can then be

performed. In the next example, the master device receives two

bytes from a slave device as follows:

1. The master device asserts a start condition on SDA.

2. The master sends the 7-bit slave address followed by the

read bit (high).

3. The addressed slave device asserts an acknowledge

on SDA.

4. The master receives a data byte.

5. The master asserts an acknowledge on SDA.

6. The master receives another 8-bit data byte.

7. The master asserts a no acknowledge (NACK) on SDA to

inform the slave that the data transfer is complete.

8. The master asserts a stop condition on SDA, and the

transaction ends.

Reading Two Bytes of Data from a 16-Bit Register

In this example, the master device reads three lots of two-byte

data from a slave device, but as many lots consisting of two-

bytes can be read as required. This protocol assumes that the

particular register address has been set up by a single byte write

operation to the address pointer register (see the previous read

example).

1. The master device asserts a start condition on SDA.

2. The master sends the 7-bit slave address followed by the

read bit (high).

3. The addressed slave device asserts an acknowledge

on SDA.

4. The master receives a data byte.

5. The master asserts an acknowledge on SDA.

6. The master receives a second data byte.

7. The master asserts an acknowledge on SDA.

8. The master receives a data byte.

9. The master asserts an acknowledge on SDA.

10. The master receives a second data byte.

11. The master asserts an acknowledge on SDA.

12. The master receives a data byte.

13. The master asserts an acknowledge on SDA.

14. The master receives a second data byte.

15. The master asserts a no acknowledge on SDA to notify the

slave that the data transfer is complete.

16. The master asserts a stop condition on SDA to end the

transaction.

...

SLAVE ADDRESS

DATA<7:0>

DATA<15:8>

FROM MASTER TO SLAVE

FROM SLAVE TO MASTER

S = START CONDITION

SR = REPEATED START

P = STOP CONDITION

A = ACKNOWLEDGE

A = NOT ACKNOWLEDGE

Figure 54. Reading Three Lots of Two Bytes of Data from the Conversion Result Register

REG POINTER

...

SLAVE ADDRESS

DATA<7:0>

FROM MASTER TO SLAVE

FROM SLAVE TO MASTER

S = START CONDITION

SR = REPEATED START

P = STOP CONDITION

A = ACKNOWLEDGE

A = NOT ACKNOWLEDGE

Figure 55. Reading Two Single Bytes of Data from a Selected Register

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