AD7294 datasheet(29/48 Pages) AD

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AD7294

Data Sheet

Rev. I | Page 28 of 47

COMMAND REGISTER (0x00)

Writing in the command register puts the device into command

mode. When in command mode, the device cycles through the

selected channels from LSB (D0) to MSB (D7) on each subsequent

read (see Table 10). A channel is selected for conversion if a one is

written to the desired bit in the command register. On power-up,

all bits in the command register are set to zero. If the external TSENSE

channels are selected in the command register byte, it is not

actually requesting a conversion. The result of the last automatic

conversion is output as part of the sequence (see the Modes of

Operation section).

If a command mode conversion is required while the autocycle

mode is active, it is necessary to disable the autocycle mode

before proceeding to the command mode (see the Autocycle

Mode section for more details).

RESULT REGISTER (0x01)

The result register is a 16-bit read-only register. The conversion

results for the four uncommitted ADC inputs and the two ISENSE

channels are stored in the result register for reading.

Bit D14 to Bit D12 are the channel allocation bits, each of which

identifies the ADC channel that corresponds to the subsequent

result (see the ADC Channel Allocation section for more details).

Bit D11 to Bit D0 contain the most recent ADC result. D15 is

reserved as an alert_flag bit. Table 11 lists the contents of the

first byte that is read from the AD7294 results register; Table 12

lists the contents of the second byte read.

Table 10. Command Register1

MSB

LSB

Bits

Channel

Read out last

result from

TSENSE2

Read out last

result from

TSENSE1

ISENSE2

ISENSE1

VIN3 (S.E.)

VIN3 − VIN2

(DIFF)

VIN2 (S.E.)

VIN2 − VIN3

(DIFF)

VIN1 (S.E.)

VIN1 − VIN0

(DIFF)

VIN0 (S.E.)

VIN0 − VIN1

(DIFF)

S.E. indicates single-ended and DIFF indicates differential.

Table 11. Result Register (First Read)

MSB

LSB

D15

D14

D13

D12

D11

D10

Alert_Flag

CHID2

CHID1

CHID0

B11

B10

Table 12. Result Register (Second Read)

MSB

LSB

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