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CS5530A Datasheet(PDF) 192 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # CS5530A
Description  Geode CS5530A I/O Companion Multi-Function South Bridge
PDF  259 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

CS5530A Datasheet(HTML) 192 Page - National Semiconductor (TI)

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192
Revision 1.1
Register Descriptions (Continued)
4.3.4
XpressAUDIO Registers - Function 3
The register space for XpressAUDIO is divided into two
sections. The first section is used to configure the PCI por-
tion of the audio interface hardware. A Base Address Reg-
ister at F3 Index 10h (F3BAR) points to the base address
of where the second portion of the register space is
located. This second section contains the control and data
registers of the audio interface.
Table 4-20 shows the PCI header registers of F3. The
memory mapped registers accessed through F3BAR are
shown in Table 4-21.
If the F3 Audio Configuration Trap bit (F0 Index 42h[0]) is
enabled, an access to the PCI header registers causes an
SMI. Access through F3BAR is not affected by this bit.
Table 4-20. F3 Index xxh: PCI Header Registers for XpressAUDIO
Bit
Description
Index 00h-01h
Vendor Identification Register (RO)
Reset Value = 1078h
Index 02h-03h
Device Identification Register (RO)
Reset Value = 0103h
Index 04h-05h
PCI Command Register (R/W)
Reset Value = 0000h
15:3
Reserved (Read Only)
2
Reserved (Read/Write)
1
Memory Space: Allow CS5530A to respond to memory cycles from the PCI bus. 0 = Disable; 1 = Enable.
This bit must be enabled to access memory offsets through F3BAR (F3 Index 10h).
0
Reserved (Read Only)
Index 06h-07h
PCI Status Register (RO)
Reset Value = 0280h
Index 08h
Device Revision ID Register (RO)
Reset Value = 00h
Index 09h-0Bh
PCI Class Code Register (RO)
Reset Value = 040100h
Index 0Ch
PCI Cache Line Size Register (RO)
Reset Value = 00h
Index 0Dh
PCI Latency Timer Register (RO)
Reset Value = 00h
Index 0Eh
PCI Header Type (RO)
Reset Value =00h
Index 0Fh
PCI BIST Register (RO)
Reset Value = 00h
Index 10h-13h
Base Address Register - F3BAR (R/W)
Reset Value = 00000000h
This register sets the base address of the memory mapped audio interface control register block. This is a 128-byte block of registers
used to control the audio FIFO and codec interface, as well as to support SMIs produced by VSA technology. Bits [6:0] are read only
(0000000), indicating a 128-byte memory address range. Refer to Table 4-21 for the bit formats and reset values of the XpressAUDIO
registers.
31:7
Audio Interface Base Address
6:0
Address Range (Read Only)
Index 14h-3Fh
Reserved
Reset Value = 00h
Index 40h-FFh
Reserved
Reset Value = xxh



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