| Electronic Components Datasheet Search |
|
PC87383 Datasheet(PDF) 18 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
PC87383 Datasheet(HTML) 18 Page - National Semiconductor (TI) |
|
18 / 77 page ![]() 2.0 Power, Reset and Clocks (Continued) www.national.com 18 Revision 1.1 Figure 2. XOR Tree (Simplified Diagram) The maximum propagation delay through the XOR tree, from the first pin in the chain to XOR_OUT is 200 ns. 2.4.3 Test Mode Entry Sequence Table 6 shows the decoding values required to enter each test mode. The test modes are decoded from the TEST and TRIS strap pins and are latched into PC87383 on power up. Table 6. Test Mode Selection Test Mode TEST TRIS No Test Mode Selected 1 1 ICT 1 0 XOR Tree 0 1 Reserved exclusively for NSC use 00 VDD XOR_OUT Pin n Pin n+1 Pin n+2 Pin n+3 Pin 21 Pin 22 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |