PC87383 datasheet(65/77 Pages) NSC

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7.0 Device Characteristics (Continued)

Revision 1.1

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7.2.4

Output, PCI 3.3V

Symbol: OPCI

7.2.5

Output, Push-Pull Buffer

Symbol: Op/n

Output, Push-Pull buffer that is capable of sourcing p mA and sinking n mA

7.2.6

Output, Open-Drain Buffer

Symbol: ODn

Output, Open-Drain output buffer, capable of sinking n mA. Output from these signals is open-drain and cannot be forced high.

7.2.7

Exceptions

1. All pins are 5V tolerant except for the pins with PCI (INPCI, OPCI) buffer types.

2. All pins are back-drive protected, except for the pins with PCI (INPCI, OPCI) buffer types.

3. The following pins have an internal static pull-up resistor (when enabled) and therefore may have leakage current from

VDD (when VIN = 0): GPIO00-07, GPIO10-11, GPO12-13, GPIO14-17, GPIO20-21, GPO22, GPIO23-24, ACK,

AFD_DSTRB, ERR, INIT, PE, SLIN_ASTRB, STB_WRITE.

4. The following pins have an internal static pull-down resistor (when enabled) and therefore may have leakage current to

VSS (when VIN = VDD): BUSY_WAIT, PE and SLCT.

5. The following strap pins have an internal static pull-up resistor enabled during VDD Power-Up Reset and therefore may

have leakage current to VDD (when VIN = 0): BADDR, TRIS, TEST.

6. Output from SLCT, BUSY_WAIT (and PE if bit 2 of PP Confg0 register is 0) is open-drain in all SPP modes except in

SPP-Compatible mode when the setup mode is ECP-based FIFO and bit 4 of the Control2 parallel port register is 1.

Otherwise, output from these signals is level 2. External 4.7 K

Ω pull-up resistors should be used.

7. Output from ACK, ERR (and PE if bit 2 of PP Confg0 register is set to 1) is open-drain in all SPP modes except in SPP-

Compatible mode when the setup mode is ECP-based FIFO and bit 4 of the Control2 parallel port register is set to 1.

Otherwise, output from these signals is level 2. External 4.7 K

Ω pull-up resistors should be used.

8. Output from STB, AFD, INIT and SLIN is open-drain in all SPP modes, except in SPP-Compatible mode when the setup mode

is ECP-based (FIFO). Otherwise, output from these signals is level 2. External 4.7 K

Ω pull-up resistors should be used.

9. IOH is valid for a GPIO pin only when it is not configured as open-drain.

10. In XOR Tree mode, the buffer type of the input pins participating in the XOR Tree (Section 2.4.2 on page 17) is INT (In-

put, TTL compatible), regardless of the buffer type of these pins in normal device operation mode; see Section 1.3 on

page 5.

Symbol

Parameter

Conditions

Min

Max

Unit

VOH

Output High Voltage

lout = -500 µA

0.9VDD

VOL

Output Low Voltage

lout =1500 µA

0.1 VDD

Symbol

Parameter

Conditions

Min

Max

Unit

VOH

Output High Voltage

IOH =-p mA

2.4

VOL

Output Low Voltage

IOL = n mA

0.4

Symbol

Parameter

Conditions

Min

Max

Unit

VOL

Output Low Voltage

IOL = n mA

0.4

PC87383 Datasheet(PDF) 65 Page - National Semiconductor (TI)

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