 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TDA2EX Datasheet(PDF) 62 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
TDA2EX Datasheet(HTML) 62 Page - Texas Instruments |
|
|
62 / 401 page  62 TDA2E-17 SPRS969E – AUGUST 2016 – REVISED JULY 2018 www.ti.com Submit Documentation Feedback Product Folder Links: TDA2E-17 Terminal Configuration and Functions Copyright © 2016–2018, Texas Instruments Incorporated Table 4-5. CSI 2 Signal Descriptions SIGNAL NAME DESCRIPTION TYPE BALL csi2_0_dx0 Serial data/clock input - line 0 (position 1) I AC1 csi2_0_dy0 Serial data/clock input - line 0 (position 1) I AB2 csi2_0_dx1 Serial data/clock input - line 1 (position 2) I AD1 csi2_0_dy1 Serial data/clock input - line 1 (position 2) I AC2 csi2_0_dx2 Serial data/clock input - line 2 (position 3) I AE2 csi2_0_dy2 Serial data/clock input - line 2 (position 3) I AD2 4.3.5 EMIF NOTE For more information, see the Memory Subsystem / EMIF Controller section of the device TRM. NOTE The index number 1 which is part of the EMIF1 signal prefixes (ddr1_*) listed in Table 4-6, EMIF Signal Descriptions, column "SIGNAL NAME" not to be confused with DDR1 type of SDRAM memories. Table 4-6. EMIF Signal Descriptions SIGNAL NAME DESCRIPTION TYPE BALL ddr1_csn0 EMIF1 Chip Select 0 O AC19 ddr1_cke EMIF1 Clock Enable O AB18 ddr1_ck EMIF1 Clock O AD21 ddr1_nck EMIF1 Negative Clock O AE21 ddr1_odt0 EMIF1 On-Die Termination for Chip Select 0 O AD18 ddr1_casn EMIF1 Column Address Strobe O AD16 ddr1_rasn EMIF1 Row Address Strobe O AD17 ddr1_wen EMIF1 Write Enable O AE18 ddr1_rst EMIF1 Reset output (DDR3-SDRAM only) O AE17 ddr1_ba0 EMIF1 Bank Address O AE16 ddr1_ba1 EMIF1 Bank Address O AA16 ddr1_ba2 EMIF1 Bank Address O AB16 ddr1_a0 EMIF1 Address Bus O AC18 ddr1_a1 EMIF1 Address Bus O AE19 ddr1_a2 EMIF1 Address Bus O AD19 ddr1_a3 EMIF1 Address Bus O AB19 ddr1_a4 EMIF1 Address Bus O AD20 ddr1_a5 EMIF1 Address Bus O AE20 ddr1_a6 EMIF1 Address Bus O AA18 ddr1_a7 EMIF1 Address Bus O AA20 ddr1_a8 EMIF1 Address Bus O Y21 ddr1_a9 EMIF1 Address Bus O AC20 ddr1_a10 EMIF1 Address Bus O AA21 ddr1_a11 EMIF1 Address Bus O AC21 ddr1_a12 EMIF1 Address Bus O AC22 ddr1_a13 EMIF1 Address Bus O AC15 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
