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AD9154 Datasheet(PDF) 93 Page - Analog Devices |
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AD9154 Datasheet(HTML) 93 Page - Analog Devices |
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93 / 124 page ![]() Data Sheet AD9154 Rev. C | Page 93 of 124 Addr. Name Bits Bit Name Settings Description Reset Access 1 EN_LANEFIFOERR Enable Lane FIFO Error Detection. A lane FIFO error occurs when there is a full or empty condition on any of the FIFOs between the deserializer block and the core digital. An error on this FIFO requires a link disable and re-enable to remove. The STATUS of the Lane FIFOs can be found in Register 0x30C (FIFO full) and Register 0x30D (FIFO empty). 0x0 R/W 1 Enable lane FIFO error. 0 RESERVED Reserved 0x0 R/W 0x020 IRQ_ENABLE1 [7:4] RESERVED Reserved. 0x0 R 3 EN_PRBSQ1 Enable PRBS Imaginary DAC Dual B interrupt. 0x0 R/W 1 Enable PRBS Q1. 2 EN_PRBSI1 Enable PRBS real DAC Dual B interrupt. 0x0 R/W 1 Enable PRBS I1. 1 EN_PRBSQ0 Enable PRBS Imaginary DAC Dual A interrupt. 0x0 R/W 1 Enable PRBS Q0. 0 EN_PRBSI0 Enable PRBS real DAC Dual A interrupt. 0x0 R/W 1 Enable PRBS I0. 0x021 IRQ_ENABLE2 7 EN_PAERR0 Link A PA Error. 0x0 R/W 1 Enable PA Error. 6 RESERVED Reserved. 0x0 R/W 5 EN_BLNKDONE0 Link A Blanking Done. 0x0 R/W 1 Enable Link A blanking done. 4 EN_REFNCOCLR0 Link A NCO Clear Tripped. 0x0 R/W 1 NCO clear tripped. 3 EN_REFLOCK0 Link A Alignment Locked. 0x0 R/W 1 Enable ref locked interrupt. 2 EN_REFROTA0 Link A Alignment Rotate. 0x0 R/W 1 Enable ref rotate interrupt. 1 EN_REFWLIM0 Link A Over/Under Threshold. 0x0 R/W 1 Enable over/under limit interrupt. 0 EN_REFTRIP0 Link A Alignment Trip. 0x0 R/W 1 Enable ref tripped interrupt. 0x022 IRQ_ENABLE3 7 EN_PAERR1 Link B PA Error. 0x0 R/W 1 Enable PA error. 6 RESERVED Reserved. 0x0 R/W 5 EN_BLNKDONE1 Link B Blanking Done. 0x0 R/W 1 Enable Link B blanking done. 4 EN_REFNCOCLR1 Link B NCO Clear Tripped. 0x0 R/W 1 NCO clear tripped. 3 EN_REFLOCK1 Link B Alignment Locked. 0x0 R/W 1 Enable ref locked interrupt. 2 EN_REFROTA1 Link B Alignment Rotate. 0x0 R/W 1 Enable ref rotate interrupt. 1 EN_REFWLIM1 Link B Over/Under Threshold. 0x0 R/W 1 Enable over/under limit interrupt. 0 EN_REFTRIP1 Link B Alignment Trip. 0x0 R/W 1 Enable ref tripped interrupt. 0x023 IRQ_STATUS0 [7:6] RESERVED Reserved. 0x0 R 5 IRQ_DACPLLLOST DAC PLL Lost. 0x0 R 1 DAC PLL lost. 4 IRQ_DACPLLLOCK DAC PLL Lock. 0x0 R 1 DAC PLL lock. |
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