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AD9175 Datasheet(PDF) 146 Page - Analog Devices |
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AD9175 Datasheet(HTML) 146 Page - Analog Devices |
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146 / 150 page ![]() AD9175 Data Sheet Rev. A | Page 146 of 150 Addr. Name Bits Bit Name Settings Description Reset Access [3:0] LONG_PA_AVG_ TIME Sets length of long PA averaging time. This control is paged by the MAINDAC_PAGE control in Register 0x008. Averaging time = 29 + LONG_PA_AVG_TIME (PA clock periods). A PA clock period is calculated by the following: 0x0 R/W If the main interpolation is >1×, PA clock period = 4 × main interpolation × DAC clock period. If channel interpolation is >1×, PA clock period = 8 × main interpolation × DAC clock period. Otherwise, PA clock period = 32 × DAC clock period. 0x586 LONG_PA_POWER_ LSB [7:0] LONG_PA_ POWER[7:0] Long average power readback. Power detected at data bus = I2 + Q2. The data bus calculation only uses the 6 MSBs of the I and Q data bus samples. This control is paged by the MAINDAC_PAGE control in Register 0x008. 0x0 R 0x587 LONG_PA_POWER_ MSB [7:5] RESERVED Reserved. 0x0 R [4:0] LONG_PA_ POWER[12:8] Long average power readback. Power detected at data bus = I2 + Q2. The data bus calculation only uses the 6 MSBs of the I and Q data bus samples. This control is paged by the MAINDAC_PAGE control in Register 0x008. 0x0 R 0x588 SHORT_PA_THRES_ LSB [7:0] SHORT_PA_ THRESHOLD[7:0] Short average power threshold for comparison. This control is paged by the MAINDAC_PAGE control in Register 0x008. 0x0 R/W 0x589 SHORT_PA_THRES_ MSB [7:5] RESERVED Reserved. 0x0 R [4:0] SHORT_PA_ THRESHOLD[12:8] Short average power threshold for comparison. This control is paged by the MAINDAC_PAGE control in Register 0x008. 0x0 R/W 0x58A SHORT_PA_ CONTROL 7 SHORT_PA_ENABLE Enable short average power calculation and error detection. This control is paged by the MAINDAC_PAGE control in Register 0x008. 0x0 R/W [6:2] RESERVED Reserved. 0x0 R [1:0] SHORT_PA_AVG_ TIME Sets length of short PA averaging. This control is paged by the MAINDAC_PAGE control in Register 0x008. Averaging time = 2SHORT_PA_AVG_TIME (PA clock periods). A PA clock period is calculated by the following: 0x0 R/W If the main interpolation is >1×, PA clock period = 4 × main interpolation × DAC clock period. If channel interpolation is >1×, PA clock period = 8 × main interpolation × DAC clock period. Otherwise, PA clock period = 32 × DAC clock period. 0x58B SHORT_PA_POWER_ LSB [7:0] SHORT_PA_ POWER[7:0] Short average power readback. Power detected at data bus = I2 + Q2. The data bus calculation only uses the 6 MSBs of the I and Q data bus samples. This control is paged by the MAINDAC_PAGE control in Register 0x008. 0x0 R 0x58C SHORT_PA_POWER_ [7:5] RESERVED Reserved. 0x0 R |
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