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C161 Datasheet(PDF) 135 Page - Infineon Technologies AG |
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C161 Datasheet(HTML) 135 Page - Infineon Technologies AG |
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135 / 400 page ![]() &3, 3DUDOOHO 3RUWV User’s Manual 7-9 1999-08 7.4 PORT0 The two 8-bit ports P0H and P0L represent the higher and lower part of PORT0, respectively. Both halfs of PORT0 can be written (e.g. via a PEC transfer) without effecting the other half. If this port is used for general purpose IO, the direction of each line can be configured via the corresponding direction registers DP0H and DP0L. P0L PORT0 Low Register SFR (FF00 H/80H Reset value: - - 00 H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 P0L .7 P0L .6 P0L .5 P0L .4 P0L .3 P0L .2 P0L .1 P0L .0 - - - - - - - - rw rw rw rw rw rw rw rw P0H PORT0 High Register SFR (FF02 H/81H) Reset value: - - 00 H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 P0H .7 P0H .6 P0H .5 P0H .4 P0H .3 P0H .2 P0H .1 P0H .0 - - - - - - - - rw rw rw rw rw rw rw rw Bit Function P0X.y Port data register P0H or P0L bit y DP0L P0L Direction Ctrl. Register ESFR (F100 H/80H) Reset value: - - 00 H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 DP0L .7 DP0L .6 DP0L .5 DP0L .4 DP0L .3 DP0L .2 DP0L .1 DP0L .0 - - - - - - - - rw rw rw rw rw rw rw rw DP0H P0H Direction Ctrl. Register ESFR (F102 H/81H) Reset Value: - - 00 H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 DP0H .7 DP0H .6 DP0H .5 DP0H .4 DP0H .3 DP0H .2 DP0H .1 DP0H .0 - - - - - - - - rw rw rw rw rw rw rw rw |
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