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C161 Datasheet(PDF) 256 Page - Infineon Technologies AG |
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C161 Datasheet(HTML) 256 Page - Infineon Technologies AG |
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256 / 400 page  &3, 7KH +LJK6SHHG 6\QFKURQRXV 6HULDO ,QWHUIDFH User’s Manual 12-10 1999-08 12.2 Half Duplex Operation In a half duplex configuration only one data line is necessary for both receiving and transmitting of data. The data exchange line is connected to both pins MTSR and MRST of each device, the clock line is connected to the SCLK pin. The master device controls the data transfer by generating the shift clock, while the slave devices receive it. Due to the fact that all transmit and receive pins are connected to the one data exchange line, serial data may be moved between arbitrary stations. Similar to full duplex mode there are two ways to avoid collisions on the data exchange line: • only the transmitting device may enable its transmit pin driver • the non-transmitting devices use open drain output and only send ones. Since the data inputs and outputs are connected together, a transmitting device will clock in its own data at the input pin (MRST for a master device, MTSR for a slave). By these means any corruptions on the common data exchange line are detected, where the received data is not equal to the transmitted data. Figure 12-5 SSC Half Duplex Configuration MCS01965 Common Transmit/ Receive Line MRST SCLK Device #2 Slave Clock Shift Register MTSR Clock Master Device #1 Clock MTSR MRST SCLK Shift Register Shift Register Clock Slave Device #3 SCLK MTSR MRST |
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