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C161 Datasheet(PDF) 259 Page - Infineon Technologies AG |
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C161 Datasheet(HTML) 259 Page - Infineon Technologies AG |
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259 / 400 page  &3, 7KH +LJK6SHHG 6\QFKURQRXV 6HULDO ,QWHUIDFH User’s Manual 12-13 1999-08 12.5 Baud Rate Generation The serial channel SSC has its own dedicated 16-bit baud rate generator with 16-bit reload capability, permitting baud rate generation independent from the timers. The baud rate generator is clocked with the CPU clock divided by 2 ( f CPU/2). The timer is counting downwards and can be started or stopped through the global enable bit SSCEN in register SSCCON. Register SSCBR is the dual-function Baud Rate Generator/Reload register. Reading SSCBR, while the SSC is enabled, returns the content of the timer. Reading SSCBR, while the SSC is disabled, returns the programmed reload value. In this mode the desired reload value can be written to SSCBR. Note: Never write to SSCBR, while the SSC is enabled. The formulas below calculate either the resulting baud rate for a given reload value, or the required reload value for a given baudrate: <SSCBR> represents the content of the reload register, taken as an unsigned 16-bit integer. The table below lists some possible baud rates together with the required reload values and the resulting bit times, for different CPU clock frequencies. Table 12-1 SSC Baudrate Calculations Baud Rate for f CPU = ... Bit Time for f CPU = ... Reload Value (SSCBR) 16 MHz 20 MHz 25 MHz 16 MHz 20 MHz 25 MHz Reserved. SSCBR must be > 0. Reserved. SSCBR must be > 0. 0000 H 4.00 MBaud 5.00 MBaud 6.25 MBaud 250 ns 200 ns 160 ns 0001 H 2.67 MBaud 3.33 MBaud 4.17 MBaud 375 ns 300 ns 240 ns 0002 H 2.00 MBaud 2.50 MBaud 3.13 MBaud 500 ns 400 ns 320 ns 0003 H 1.60 MBaud 2.00 MBaud 2.50 MBaud 625 ns 500 ns 400 ns 0004 H 1.00 MBaud 1.25 MBaud 1.56 MBaud 1.00 µs 800 ns 640 ns 0007 H 800 KBaud 1.0 MBaud 1.25 MBaud 1.25 µs1 µs 800 ns 0009 H 100 KBaud 125 KBaud 156 KBaud 10 µs8 µs6.4 µs 004F H 80 KBaud 100 KBaud 125 KBaud 12.5 µs10 µs8 µs0063 H 64 KBaud 80 KBaud 100 KBaud 15.6 µs12.5 µs10 µs007C H 1.0 KBaud 1.25 KBaud 1.56 KBaud 1 ms 800 µs 640 µs1F3F H B SSC = fCPU 2 * (<SSCBR> + 1) SSCBR = ( fCPU 2 * Baudrate SSC ) - 1 |
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