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C161 Datasheet(PDF) 263 Page - Infineon Technologies AG |
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C161 Datasheet(HTML) 263 Page - Infineon Technologies AG |
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263 / 400 page  &3, 7KH :DWFKGRJ 7LPHU :'7 User’s Manual 13-1 1999-08 13 The Watchdog Timer (WDT) To allow recovery from software or hardware failure, the C161PI provides a Watchdog Timer. If the software fails to service this timer before an overflow occurs, an internal reset sequence will be initiated. This internal reset will also pull the RSTOUT pin low, which also resets the peripheral hardware which might be the cause for the malfunction. When the watchdog timer is enabled and the software has been designed to service it regularly before it overflows, the watchdog timer will supervise the program execution as it only will overflow if the program does not progress properly. The watchdog timer will also time out if a software error was due to hardware related failures. This prevents the controller from malfunctioning for longer than a user-specified time. Note: When the bidirectional reset is enabled also pin RSTIN will be pulled low for the duration of the internal reset sequence upon a software reset or a watchdog timer reset. The watchdog timer provides two registers: • a read-only timer register that contains the current count, and • a control register for initialization and reset source detection. Figure 13-1 SFRs and Port Pins associated with the Watchdog Timer The watchdog timer is a 16-bit up counter which is clocked with the prescaled CPU clock ( f CPU). The prescaler divides the CPU clock... • by 2 (WDTIN = ’0’), or • by 128 (WDTIN = ’1’). WDTCON RSTOUT (deactivated by EINIT) Reset Indication Pins Davta Registers Control Registers WDT RSTIN (bidirectional reset only) |
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