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C161 Datasheet(PDF) 262 Page - Infineon Technologies AG |
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C161 Datasheet(HTML) 262 Page - Infineon Technologies AG |
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262 / 400 page  &3, 7KH +LJK6SHHG 6\QFKURQRXV 6HULDO ,QWHUIDFH User’s Manual 12-16 1999-08 12.7 SSC Interrupt Control Three bit addressable interrupt control registers are provided for serial channel SSC. Register SSCTIC controls the transmit interrupt, SSCRIC controls the receive interrupt and SSCEIC controls the error interrupt of serial channel SSC. Each interrupt source also has its own dedicated interrupt vector. SCTINT is the transmit interrupt vector, SCRINT is the receive interrupt vector, and SCEINT is the error interrupt vector. The cause of an error interrupt request (receive, phase, baudrate,transmit error) can be identified by the error status flags in control register SSCCON. Note: In contrary to the error interrupt request flag SSCEIR, the error status flags SSCxE are not reset automatically upon entry into the error interrupt service routine, but must be cleared by software. Note: Please refer to the general Interrupt Control Register description for an explanation of the control fields. SSCTIC SSC Transmit Intr. Ctrl. Reg. SFR (FF72 H/B9H) Reset value: - - 00 H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SSC TIR SSC TIE ILVL GLVL - - - - - - - - rw rw rw rw SSCRIC SSC Receive Intr. Ctrl. Reg. SFR (FF74 H/BAH) Reset value: - - 00 H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SSC RIR SSC RIE ILVL GLVL - - - - - - - - rw rw rw rw SSCEIC SSC Error Intr. Ctrl. Reg. SFR (FF76 H/BBH) Reset value: - - 00 H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SSC EIR SSC EIE ILVL GLVL - - - - - - - - rw rw rw rw |
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