DS3172 datasheet(103/232 Pages) DALLAS

103 / 232 page

DS3171/DS3172/DS3173/DS3174

103 of 231

10.9.3.1 Transmit Data Storage

The Transmit Data Storage block contains the registers for two FEAC codes (C{1:6]) and controller circuitry for

reading and writing the memory. The Transmit Data Storage receives data from the microprocessor interface, and

stores the data in memory. The Transmit FEAC Processor reads the data from the Transmit Data Storage.

10.9.3.2 Transmit FEAC Processor

The Transmit FEAC Processor accepts data from the Transmit Data Storage performs FEAC processing. The

FEAC codes are read from Transmit Data Storage with the MSB (C[1]) in TFCA[0] or TFCB[0], and the LSB (C[6])

in TFCA[5] or TFCB[5].

FEAC processing has four modes of operation (Idle, single code, dual code, and continuous code). In Idle mode, all

ones are output on the outgoing FEAC data stream. In single code mode, the code from TFCA[5:0] is inserted into

a codeword (See Figure 10-24), and sent ten consecutive times. Once the ten codewords have been sent, all ones

are output. In dual code mode, the code from TFCA[5:0] is inserted into a codeword, and sent ten consecutive

times. Then the code from TFCB[5:0] is inserted into a codeword, and sent ten consecutive times. Once both

codewords have both been sent ten times, all ones are output. In continuous mode, the code from TFCA[5:0] is

inserted into a codeword, and sent until the mode is changed

10.9.3.3 Receive FEAC Processor

The Receive FEAC Processor accepts an incoming data line and extracts all overhead and performs FEAC code

extraction , and Idle detection.

Figure 10-24. FEAC Codeword Format

Cx - FEAC Code

Receive/Transmit Order

MSB

LSB

C5 C4 C3 C2 C1

FEAC code extraction determines the codeword boundary by identifying the codeword sequence and extracts the

FEAC code. A FEAC codeword is a repeating 16-bit pattern (See Figure 10-24). The codeword sequence is the

pattern (0xxxxxx011111111) that contains each FEAC code (C[6:1]). Each time slot is checked for a codeword

sequence. Once a codeword sequence is found, the FEAC code is checked. If the same FEAC code is received in

three consecutive codewords without errors, the FEAC code detection indication is set, and the FEAC code is

stored in the Receive FIFO with the MSB (C[1]) in RFF[0], and the LSB (C[6]) in RFF[5]. The FEAC code detection

indication is cleared if two consecutively received FEAC codewords differ from the current FEAC codeword, or a

FEAC Idle condition is detected.

Idle detection detects a FEAC Idle condition. A FEAC idle condition is declared if sixteen consecutive ones are

received. The FEAC Idle condition is terminated when the FEAC code detection indication is set.

10.9.3.4 Receive FEAC FIFO

The Receive FIFO block contains memory for four FEAC codes (C[1:6]) and controller circuitry for reading and

writing the memory. The Receive FIFO controller functions include filling the memory, tracking the memory fill level,

maintaining the memory read and write pointers, and detecting memory overflow and underflow conditions. The

Receive FIFO accepts data from the Receive FEAC Processor and stores the data in memory. The data is read

from the receive FIFO via the microprocessor interface. The Receive FIFO also outputs FIFO fill status (empty) via

the microprocessor interface. All operations are code based (six bits). The Receive FIFO is considered empty when

it does not contain any data. The Receive FIFO accepts data from the Receive FEAC Processor until full. If a

FEAC code is received while full, the data is discarded and a FIFO overflow condition is declared. If the Receive

FIFO is read while the FIFO is empty, the read is ignored.

DS3172 Datasheet(PDF) 103 Page - Dallas Semiconductor

DS3172 Datasheet(HTML) 103 Page - Dallas Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL