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SC3200 Datasheet(PDF) 199 Page - Advanced Micro Devices |
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SC3200 Datasheet(HTML) 199 Page - Advanced Micro Devices |
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199 / 447 page ![]() AMD Geode™ SC3200 Processor Data Book 199 Core Logic Module - Register Summary Revision 5.1 Table 6-21. F2BAR4: IDE Controller Support Registers Summary F2BAR4+ I/O Offset Width (Bits) Type Name Reset Value Reference (Table 6-36) 00h 8 R/W IDE Bus Master 0 Command Register — Primary 00h Page 277 01h --- --- Not Used --- Page 277 02h 8 R/W IDE Bus Master 0 Status Register — Primary 00h Page 277 03h --- --- Not Used --- Page 277 04h-07h 32 R/W IDE Bus Master 0 PRD Table Address — Primary 00000000h Page 277 08h 8 R/W IDE Bus Master 1 Command Register — Secondary 00h Page 278 09h --- --- Not Used --- Page 278 0Ah 8 R/W IDE Bus Master 1 Status Register — Secondary 00h Page 278 0Bh --- --- Not Used --- Page 278 0Ch-0Fh 32 R/W IDE Bus Master 1 PRD Table Address — Secondary 00000000h Page 278 Table 6-22. F3: PCI Header Registers for Audio Support Summary F3 Index Width (Bits) Type Name Reset Value Reference (Table 6-37) 00h-01h 16 RO Vendor Identification Register 100Bh Page 279 02h-03h 16 RO Device Identification Register 0503h Page 279 04h-05h 16 R/W PCI Command Register 0000h Page 279 06h-07h 16 RO PCI Status Register 0280h Page 279 08h 8 RO Device Revision ID Register 00h Page 279 09h-0Bh 24 RO PCI Class Code Register 040100h Page 279 0Ch 8 RO PCI Cache Line Size Register 00h Page 279 0Dh 8 RO PCI Latency Timer Register 00h Page 279 0Eh 8 RO PCI Header Type Register 00h Page 279 0Fh 8 RO PCI BIST Register 00h Page 279 10h-13h 32 R/W Base Address Register 0 (F3BAR0) — Sets the base address for the memory mapped VSA audio interface control register block (summarized in Table 6-23). 00000000h Page 279 14h-2Bh --- --- Reserved 00h Page 279 2Ch-2Dh 16 RO Subsystem Vendor ID 100Bh Page 279 2Eh-2Fh 16 RO Subsystem ID 0503h Page 279 30h-FFh --- --- Reserved 00h Page 279 |
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