SC3200 datasheet(269/447 Pages) AMD

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AMD Geode™ SC3200 Processor Data Book

269

Core Logic Module - SMI Status and ACPI Registers - Function 1

Revision 5.1

Offset 12h-13h

GPE0_EN — General Purpose Event 0 Enable Register (R/W)

Reset Value: 0000h

In order for the ACPI events described below to generate an SCI, the SCI_EN bit must also be set (F1BAR1+I/O Offset 0Ch[0] = 1).

The SCIs enabled in this register are globally enabled by setting F1BAR1+I/O Offset 0Ch[0] to 1. The status of the SCIs is reported in

F1BAR1+I/O Offset 10h.

15:12

Reserved.

GPWIO2_EN. Allow GPWIO2 to generate an SCI.

0: Disable.

1: Enable.

A fixed high-to-low or low-to-high transition (debounce period) of 31 µs exists in order for GPWIO2 to be recognized.

The setting of this bit can be overridden via F1BAR1+I/O Offset 15h[6] to force an SMI.

GPWIO1_EN. Allow GPWIO1 to generate an SCI.

0: Disable.

1: Enable.

See F1BAR1+I/O Offset 07h[3] for debounce information.

The setting of this bit can be overridden via F1BAR1+I/O Offset 15h[5] to force an SMI.

GPWIO0_EN. Allow GPWIO0 to generate an SCI.

0: Disable.

1: Enable.

See F1BAR1+I/O Offset 07h[3] for debounce information.

The setting of this bit can be overridden via F1BAR1+I/O Offset 15h[4] to force an SMI.

Reserved. Must be set to 0

USB_EN. Allow USB events to generate a SCI.

0: Disable.

1: Enable

THRM_EN. Allow THRM# to generate an SCI.

0: Disable.

1: Enable

SMI_EN. Allow SMI events to generate an SCI.

0: Disable.

1: Enable

GPIO_EN. Allow GPIOs (GPIO47-GPIO32 and GPIO15-GPIO0) to generate an SCI.

0: Disable.

1: Enable.

F0BAR0+I/O Offset 08h/18h selects which GPIOs are enabled for PME generation. This bit (GPIO_EN) globally enables

those selected GPIOs for generation of an SCI.

2:1

Reserved. Must be set to 0.

PWR_U_REQ_EN. Allow power-up request events from the SuperI/O module to generate an SCI.

0: Disable.

1: Enable.

A power-up request event is defined as any of the following events/activities: Modem, Telephone, Keyboard, Mouse, CEIR

(Consumer Electronic Infrared)

Table 6-34. F1BAR1+I/O Offset: ACPI Support Registers (Continued)

Bit

Description

SC3200 Datasheet(PDF) 269 Page - Advanced Micro Devices

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