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SC3200 Datasheet(PDF) 152 Page - Advanced Micro Devices |
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SC3200 Datasheet(HTML) 152 Page - Advanced Micro Devices |
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152 / 447 page ![]() 152 AMD Geode™ SC3200 Processor Data Book SuperI/O Module Revision 5.1 Table 5-47. Bank Selection Encoding BSR Bits Bank Selected Functionality 7 6543 210 0 x xxxx xx 0 UART + IR 1 0 xxxx xx 1 1 1 xxxx 1 x 1 1 1 xxxx x 1 1 1 1100 000 2 1 1100 100 3 1 1101 000 4 IR Only 1 1101 100 5 1 1110 000 6 1 1110 100 7 Table 5-48. Bank 1 Register Map Offset Type Name 00h R/W LBGD(L). Legacy Baud Generator Divisor Port (Low Byte) 01h R/W LBGD(H). Legacy Baud Generator Divisor Port (High Byte) 02h --- RSVD. Reserved 03h W LCR1. Link Control R/W BSR1. Bank Select 04h-07h --- RSVD. Reserved 1. When bit 7 of this register is set to 1, bits [6:0] of BSR select the bank, as shown in Table 5-47. Table 5-49. Bank 2 Register Map Offset Type Name 00h R/W BGD(L). Baud Generator Divisor Port (Low Byte) 01h R/W BGD(H). Baud Generator Divisor Port (High Byte) 02h R/W EXCR1. Extended Control 1 03h R/W BSR. Bank Select 04h R/W EXCR2. Extended Control 2 05h --- RSVD. Reserved 06h RO TXFLV. TX FIFO Level 07h RO RXFLV. RX FIFO Level |
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