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PC8374L Datasheet(PDF) 234 Page - National Semiconductor (TI) |
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PC8374L Datasheet(HTML) 234 Page - National Semiconductor (TI) |
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234 / 239 page  10.0 Device Characteristics (Continued) www.national.com 234 Revision1.1 Main Power Good Power Distribution Control Figure 55. BKFD_CUT and LATCHED_BF_CUT (AC Characteristics) Symbol Figure Description Reference Conditions Min Max Units tPSD − Low-to-High Delay1 1. Not tested. Guaranteed by design. After RE of PWRGD_PS 100 120 ms tS3D − High-to-Low Delay1 After FE of SLP_S3 20 ns tR − PWRGD_3V Rise Time1 0.8V to 2.0V 50 ns tF − PWRGD_3V Fall Time1 2.0V to 0.8V 50 ns Symbol Figure Description Reference Conditions Min Max Units tPB − BKFD_CUT Propagation Delay1 1. Not tested. Guaranteed by design. PWRGD_PS or SLP_S3 to BKFD_CUT 1 µs tTB − BKFD_CUT Transition Time1 0.8V to 2.0V 50 ns tPL 55 LATCHED_BF_CUT Propagation Delay1 BKFD_CUT or SLP_S5 to LATCHED_BF_CUT 1 µs tTL 55 LATCHED_BF_CUT Transition Time1 0.8V to 2.0V 50 ns 0.8V 1.4V 2.0V SLP_S5 BKFD_CUT LATCHED_BF_CUT tPL tTL 0.8V tPL 1.4V tTL 2.0V tPL tPL Winbond Electronics Corp. Advanced PC Product Center |
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